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i3lock-color
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fix compiling for 32-bit machines / machine without SSE2

This commit is contained in:
Pandora 2017-12-07 16:09:13 -05:00
parent 29251d61cd
commit 4318dbe051
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GPG Key ID: 55DB77C2A03E1EF5
3 changed files with 8 additions and 7 deletions
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4
blur.c
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@ -121,8 +121,8 @@ void blur_impl_horizontal_pass_generic(uint32_t *src, uint32_t *dst, int width,
rgbaIn[i] = *(src - k);
} else {
for (; i < KERNEL_SIZE; i++) {
if ((long long) ((src + 4*i - HALF_KERNEL) + 1)
> (long long) (o_src + (height * width)))
if ((uintptr_t) ((src + 4*i - HALF_KERNEL) + 1)
> (uintptr_t) (o_src + (height * width)))
break;
rgbaIn[i] = *(src + i - HALF_KERNEL);
}

3
blur.h
View File

@ -9,9 +9,10 @@
#define HALF_KERNEL KERNEL_SIZE / 2
void blur_image_surface(cairo_surface_t *surface, int sigma);
#ifdef __SSE2__
void blur_impl_horizontal_pass_sse2(uint32_t *src, uint32_t *dst, int width, int height);
#endif
void blur_impl_horizontal_pass_generic(uint32_t *src, uint32_t *dst, int width, int height);
#endif

8
blur_simd.c
View File

@ -12,7 +12,7 @@
// number of xmm registers needed to store input pixels for given kernel size
#define REGISTERS_CNT (KERNEL_SIZE + 4/2) / 4
#ifdef __SSE2__
void blur_impl_horizontal_pass_sse2(uint32_t *src, uint32_t *dst, int width, int height) {
uint32_t* o_src = src;
for (int row = 0; row < height; row++) {
@ -46,8 +46,8 @@ void blur_impl_horizontal_pass_sse2(uint32_t *src, uint32_t *dst, int width, int
rgbaIn[k] = _mm_load_si128((__m128i*)(_rgbaIn + 4*k));
} else {
for (int k = 0; k < REGISTERS_CNT; k++) {
if ((long long) (((__m128i*) src + 4*k - HALF_KERNEL) + 1)
> (long long) (o_src + (height * width)))
if ((uintptr_t) (((__m128i*) src + 4*k - HALF_KERNEL) + 1)
> (uintptr_t) (o_src + (height * width)))
break;
rgbaIn[k] = _mm_loadu_si128((__m128i*)(src + 4*k - HALF_KERNEL));
}
@ -76,4 +76,4 @@ void blur_impl_horizontal_pass_sse2(uint32_t *src, uint32_t *dst, int width, int
}
}
}
#endif