2020-09-10 17:20:46 -04:00
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#include <assert.h>
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#include "insns.inc"
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#include "internal.h"
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#include "vm_core.h"
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#include "vm_callinfo.h"
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#include "builtin.h"
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#include "insns_info.inc"
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#include "ujit_compile.h"
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#include "ujit_asm.h"
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2020-09-14 13:31:34 -04:00
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// TODO: give ujit_examples.h some more meaningful file name
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#include "ujit_examples.h"
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2020-09-15 17:04:33 -04:00
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// Code generation context
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typedef struct ctx_struct
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{
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2020-09-16 10:33:34 -04:00
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// Current PC
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VALUE* pc;
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2020-09-15 17:04:33 -04:00
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// TODO: virtual stack pointer handling
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} ctx_t;
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// Code generation function
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typedef void (*codegen_fn)(codeblock_t* cb, ctx_t* ctx);
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// Map from YARV opcodes to code generation functions
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static st_table *gen_fns;
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// Code block into which we write machine code
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2020-09-10 17:20:46 -04:00
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static codeblock_t block;
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static codeblock_t* cb = NULL;
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2020-09-14 13:31:34 -04:00
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// Hash table of encoded instructions
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2020-09-11 14:58:32 -04:00
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extern st_table *rb_encoded_insn_data;
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2020-09-14 13:31:34 -04:00
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static void ujit_init();
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// Ruby instruction entry
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static void
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ujit_instr_entry(codeblock_t* cb)
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{
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for (size_t i = 0; i < sizeof(ujit_pre_call_bytes); ++i)
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cb_write_byte(cb, ujit_pre_call_bytes[i]);
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}
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// Ruby instruction exit
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static void
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ujit_instr_exit(codeblock_t* cb)
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{
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for (size_t i = 0; i < sizeof(ujit_post_call_bytes); ++i)
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cb_write_byte(cb, ujit_post_call_bytes[i]);
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}
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// Keep track of mapping from instructions to generated code
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2020-09-11 15:36:40 -04:00
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// See comment for rb_encoded_insn_data in iseq.c
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2020-09-11 14:58:32 -04:00
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static void
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addr2insn_bookkeeping(void *code_ptr, int insn)
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{
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const void * const *table = rb_vm_get_insns_address_table();
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const void * const translated_address = table[insn];
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st_data_t encoded_insn_data;
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if (st_lookup(rb_encoded_insn_data, (st_data_t)translated_address, &encoded_insn_data)) {
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st_insert(rb_encoded_insn_data, (st_data_t)code_ptr, encoded_insn_data);
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}
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else {
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rb_bug("ujit: failed to find info for original instruction while dealing with addr2insn");
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}
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}
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2020-09-10 17:20:46 -04:00
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2020-09-16 10:33:34 -04:00
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// Get the current instruction opcode from the context object
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int ctx_get_opcode(ctx_t* ctx)
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{
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return (int)(*ctx->pc);
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}
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// Get an instruction argument from the context object
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VALUE ctx_get_arg(ctx_t* ctx, size_t arg_idx)
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{
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assert (arg_idx + 1 < insn_len(ctx_get_opcode(ctx)));
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return *(ctx->pc + arg_idx + 1);
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}
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/*
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Generate a chunk of machine code for one individual bytecode instruction
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Eventually, this will handle multiple instructions in a sequence
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2020-09-16 12:37:59 -04:00
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MicroJIT code gets a pointer to the cfp as the first argument in RDI
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2020-09-16 10:33:34 -04:00
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See rb_ujit_empty_func(rb_control_frame_t *cfp) in iseq.c
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2020-09-16 12:37:59 -04:00
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System V ABI reference:
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https://wiki.osdev.org/System_V_ABI#x86-64
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*/
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uint8_t *
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ujit_compile_insn(rb_iseq_t *iseq, size_t insn_idx)
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{
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// If not previously done, initialize ujit
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if (!cb)
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{
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ujit_init();
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2020-09-10 17:20:46 -04:00
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}
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2020-09-14 16:59:39 -04:00
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if (cb->write_pos + 1024 >= cb->mem_size)
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{
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rb_bug("out of executable memory");
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}
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2020-09-16 10:33:34 -04:00
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// Get a pointer to the current write position in the code block
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uint8_t *code_ptr = &cb->mem_block[cb->write_pos];
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//printf("write pos: %ld\n", cb->write_pos);
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2020-09-16 13:52:35 -04:00
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// Get the first opcode in the sequence
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int first_opcode = (int)iseq->body->iseq_encoded[insn_idx];
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2020-09-16 10:33:34 -04:00
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// Create codegen context
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ctx_t ctx;
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2020-09-16 13:52:35 -04:00
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// For each instruction to compile
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size_t num_instrs;
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for (num_instrs = 0;; ++num_instrs)
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{
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// Set the current PC
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ctx.pc = &iseq->body->iseq_encoded[insn_idx];
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// Get the current opcode
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int opcode = ctx_get_opcode(&ctx);
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//const char* name = insn_name(insn);
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//printf("%s\n", name);
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// Lookup the codegen function for this instruction
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st_data_t st_gen_fn;
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int found = rb_st_lookup(gen_fns, opcode, &st_gen_fn);
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if (!found)
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{
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break;
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}
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// Write the pre call bytes before the first instruction
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if (num_instrs == 0)
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{
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ujit_instr_entry(cb);
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}
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// Call the code generation function
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codegen_fn gen_fn = (codegen_fn)st_gen_fn;
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gen_fn(cb, &ctx);
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// Move to the next instruction
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insn_idx += insn_len(opcode);
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}
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2020-09-11 15:36:40 -04:00
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2020-09-16 13:52:35 -04:00
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// If no instructions were compiled
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if (num_instrs == 0)
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{
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return NULL;
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}
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2020-09-15 17:04:33 -04:00
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// Directly return the next PC, which is a constant
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void *next_pc = &iseq->body->iseq_encoded[insn_idx];
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2020-09-15 17:04:33 -04:00
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mov(cb, RAX, const_ptr_opnd(next_pc));
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2020-09-14 11:54:25 -04:00
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2020-09-15 17:04:33 -04:00
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// Write the post call bytes
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ujit_instr_exit(cb);
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2020-09-10 17:20:46 -04:00
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2020-09-16 13:52:35 -04:00
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addr2insn_bookkeeping(code_ptr, first_opcode);
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2020-09-15 17:04:33 -04:00
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return code_ptr;
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2020-09-16 10:33:34 -04:00
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}
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2020-09-14 11:54:25 -04:00
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2020-09-16 10:33:34 -04:00
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void gen_nop(codeblock_t* cb, ctx_t* ctx)
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{
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}
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2020-09-14 11:54:25 -04:00
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2020-09-16 10:33:34 -04:00
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void gen_pop(codeblock_t* cb, ctx_t* ctx)
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{
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// Decrement SP
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sub(cb, mem_opnd(64, RDI, 8), imm_opnd(8));
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}
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2020-09-14 16:59:39 -04:00
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2020-09-16 10:33:34 -04:00
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void gen_putobject_int2fix(codeblock_t* cb, ctx_t* ctx)
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{
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// Load current SP into RAX
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mov(cb, RAX, mem_opnd(64, RDI, 8));
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2020-09-16 10:33:34 -04:00
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// Write constant at SP
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int opcode = ctx_get_opcode(ctx);
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int cst_val = (opcode == BIN(putobject_INT2FIX_0_))? 0:1;
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mov(cb, mem_opnd(64, RAX, 0), imm_opnd(INT2FIX(cst_val)));
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2020-09-14 16:59:39 -04:00
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2020-09-16 10:33:34 -04:00
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// Load incremented SP into RCX
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lea(cb, RCX, mem_opnd(64, RAX, 8));
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2020-09-14 16:59:39 -04:00
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2020-09-16 10:33:34 -04:00
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// Write back incremented SP
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mov(cb, mem_opnd(64, RDI, 8), RCX);
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}
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2020-09-14 16:59:39 -04:00
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2020-09-16 10:33:34 -04:00
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// TODO: putnil
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// could we reuse code from putobject_int2fix here?
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2020-09-15 15:12:31 -04:00
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2020-09-16 10:33:34 -04:00
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// TODO: implement putself
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2020-09-15 15:12:31 -04:00
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2020-09-16 10:33:34 -04:00
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// TODO: implement putobject
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2020-09-15 15:12:31 -04:00
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2020-09-16 10:33:34 -04:00
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void gen_getlocal_wc0(codeblock_t* cb, ctx_t* ctx)
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{
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// Load current SP from CFP
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mov(cb, RAX, mem_opnd(64, RDI, 8));
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2020-09-15 15:12:31 -04:00
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2020-09-16 10:33:34 -04:00
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// Load block pointer from CFP
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mov(cb, RDX, mem_opnd(64, RDI, 32));
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2020-09-15 15:12:31 -04:00
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2020-09-16 10:33:34 -04:00
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// Compute the offset from BP to the local
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int32_t local_idx = (int32_t)ctx_get_arg(ctx, 0);
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const int32_t offs = -8 * local_idx;
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2020-09-15 15:12:31 -04:00
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2020-09-16 10:33:34 -04:00
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// Load the local from the block
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mov(cb, RCX, mem_opnd(64, RDX, offs));
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2020-09-15 15:12:31 -04:00
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2020-09-16 10:33:34 -04:00
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// Write the local at SP
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mov(cb, mem_opnd(64, RAX, 0), RCX);
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2020-09-15 15:12:31 -04:00
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2020-09-16 10:33:34 -04:00
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// Compute address of incremented SP
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lea(cb, RCX, mem_opnd(64, RAX, 8));
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2020-09-15 17:04:33 -04:00
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2020-09-16 10:33:34 -04:00
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// Write back incremented SP
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mov(cb, mem_opnd(64, RDI, 8), RCX);
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2020-09-10 17:20:46 -04:00
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}
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2020-09-14 13:31:34 -04:00
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static void ujit_init()
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{
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// 4MB ought to be enough for anybody
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cb = █
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cb_init(cb, 4000000);
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2020-09-15 17:04:33 -04:00
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// Initialize the codegen function table
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gen_fns = rb_st_init_numtable();
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// Map YARV opcodes to the corresponding codegen functions
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st_insert(gen_fns, (st_data_t)BIN(nop), (st_data_t)&gen_nop);
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st_insert(gen_fns, (st_data_t)BIN(pop), (st_data_t)&gen_pop);
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2020-09-16 10:33:34 -04:00
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st_insert(gen_fns, (st_data_t)BIN(putobject_INT2FIX_0_), (st_data_t)&gen_putobject_int2fix);
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st_insert(gen_fns, (st_data_t)BIN(putobject_INT2FIX_1_), (st_data_t)&gen_putobject_int2fix);
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st_insert(gen_fns, (st_data_t)BIN(getlocal_WC_0), (st_data_t)&gen_getlocal_wc0);
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2020-09-14 13:31:34 -04:00
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}
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