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Ported neg, and, or instructions
This commit is contained in:
Maxime Chevalier-Boisvert
Alan Wu
parent
3739588811
commit
090255456a
4 changed files with 181 additions and 40 deletions
149
ujit_asm.c
149
ujit_asm.c
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@ -746,6 +746,22 @@ void cb_write_jcc(codeblock_t* cb, const char* mnem, uint8_t op0, uint8_t op1, s
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cb_write_int(cb, 0, 32);
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}
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// Encode a conditional move instruction
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/*
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void writeCmov(CodeBlock cb, const char mnem, ubyte opcode1, X86Reg dst, X86Opnd src)
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{
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//cb.writeASM(mnem, dst, src);
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assert (src.isReg || src.isMem);
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assert (dst.size >= 16, "invalid dst reg size in cmov");
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auto szPref = dst.size is 16;
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auto rexW = dst.size is 64;
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cb.writeRMInstr!('r', 0xFF, 0x0F, opcode1)(szPref, rexW, X86Opnd(dst), src);
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}
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*/
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// add - Integer addition
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void add(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1)
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{
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@ -765,6 +781,25 @@ void add(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1)
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);
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}
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/// and - Bitwise AND
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void and(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1)
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{
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cb_write_rm_multi(
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cb,
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"and",
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0x20, // opMemReg8
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0x21, // opMemRegPref
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0x22, // opRegMem8
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0x23, // opRegMemPref
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0x80, // opMemImm8
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0x83, // opMemImmSml
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0x81, // opMemImmLrg
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0x04, // opExtImm
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opnd0,
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opnd1
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);
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}
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/// call - Call to label with 32-bit offset
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void call_label(codeblock_t* cb, size_t label_idx)
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{
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@ -787,6 +822,40 @@ void call(codeblock_t* cb, x86opnd_t opnd)
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cb_write_rm(cb, false, false, NO_OPND, opnd, 2, 1, 0xFF);
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}
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/*
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/// cmovcc - Conditional move
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alias cmova = writeCmov!("cmova", 0x47);
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alias cmovae = writeCmov!("cmovae", 0x43);
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alias cmovb = writeCmov!("cmovb", 0x42);
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alias cmovbe = writeCmov!("cmovbe", 0x46);
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alias cmovc = writeCmov!("cmovc", 0x42);
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alias cmove = writeCmov!("cmove", 0x44);
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alias cmovg = writeCmov!("cmovg", 0x4F);
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alias cmovge = writeCmov!("cmovge", 0x4D);
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alias cmovl = writeCmov!("cmovl", 0x4C);
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alias cmovle = writeCmov!("cmovle", 0x4E);
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alias cmovna = writeCmov!("cmovna", 0x46);
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alias cmovnae = writeCmov!("cmovnae", 0x42);
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alias cmovnb = writeCmov!("cmovnb", 0x43);
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alias cmovnbe = writeCmov!("cmovnbe", 0x47);
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alias cmovnc = writeCmov!("cmovnc", 0x43);
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alias cmovne = writeCmov!("cmovne", 0x45);
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alias cmovnge = writeCmov!("cmovng", 0x4E);
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alias cmovnge = writeCmov!("cmovnge", 0x4C);
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alias cmovnl = writeCmov!("cmovnl", 0x4D);
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alias cmovnle = writeCmov!("cmovnle", 0x4F);
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alias cmovno = writeCmov!("cmovno", 0x41);
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alias cmovnp = writeCmov!("cmovnp", 0x4B);
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alias cmovns = writeCmov!("cmovns", 0x49);
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alias cmovnz = writeCmov!("cmovnz", 0x45);
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alias cmovo = writeCmov!("cmovno", 0x40);
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alias cmovp = writeCmov!("cmovp", 0x4A);
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alias cmovpe = writeCmov!("cmovpe", 0x4A);
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alias cmovpo = writeCmov!("cmovpo", 0x4B);
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alias cmovs = writeCmov!("cmovs", 0x48);
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alias cmovz = writeCmov!("cmovz", 0x44);
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*/
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/// cmp - Compare and set flags
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void cmp(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1)
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{
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@ -1094,6 +1163,19 @@ void mov(codeblock_t* cb, x86opnd_t dst, x86opnd_t src)
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}
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}
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// neg - Integer negation (multiplication by -1)
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void neg(codeblock_t* cb, x86opnd_t opnd)
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{
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write_rm_unary(
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cb,
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"neg",
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0xF6, // opMemReg8
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0xF7, // opMemRegPref
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0x03, // opExt
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opnd
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);
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}
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// nop - Noop, one or multiple bytes long
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void nop(codeblock_t* cb, size_t length)
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{
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@ -1174,32 +1256,23 @@ void not(codeblock_t* cb, x86opnd_t opnd)
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);
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}
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/*
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/// or - Bitwise OR
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alias or = writeRMMulti!(
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"or",
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0x08, // opMemReg8
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0x09, // opMemRegPref
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0x0A, // opRegMem8
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0x0B, // opRegMemPref
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0x80, // opMemImm8
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0x83, // opMemImmSml
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0x81, // opMemImmLrg
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0x01 // opExtImm
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);
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*/
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/// push - Push a register on the stack
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void push(codeblock_t* cb, x86opnd_t reg)
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void or(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1)
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{
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assert (reg.num_bits == 64);
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//cb.writeASM("push", reg);
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if (rex_needed(reg))
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cb_write_rex(cb, false, 0, 0, reg.reg.reg_no);
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cb_write_opcode(cb, 0x50, reg);
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cb_write_rm_multi(
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cb,
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"or",
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0x08, // opMemReg8
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0x09, // opMemRegPref
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0x0A, // opRegMem8
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0x0B, // opRegMemPref
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0x80, // opMemImm8
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0x83, // opMemImmSml
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0x81, // opMemImmLrg
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0x01, // opExtImm
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opnd0,
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opnd1
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);
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}
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/// pop - Pop a register off the stack
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@ -1215,6 +1288,19 @@ void pop(codeblock_t* cb, x86opnd_t reg)
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cb_write_opcode(cb, 0x58, reg);
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}
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/// push - Push a register on the stack
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void push(codeblock_t* cb, x86opnd_t reg)
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{
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assert (reg.num_bits == 64);
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//cb.writeASM("push", reg);
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if (rex_needed(reg))
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cb_write_rex(cb, false, 0, 0, reg.reg.reg_no);
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cb_write_opcode(cb, 0x50, reg);
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}
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/// ret - Return from call, popping only the return address
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void ret(codeblock_t* cb)
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{
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@ -1299,3 +1385,18 @@ void sub(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1)
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opnd1
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);
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}
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/*
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/// xor - Exclusive bitwise OR
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alias xor = writeRMMulti!(
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"xor",
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0x30, // opMemReg8
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0x31, // opMemRegPref
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0x32, // opRegMem8
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0x33, // opRegMemPref
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0x80, // opMemImm8
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0x83, // opMemImmSml
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0x81, // opMemImmLrg
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0x06 // opExtImm
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);
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*/
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@ -193,6 +193,7 @@ void cb_link_labels(codeblock_t* cb);
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// Encode individual instructions into a code block
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void add(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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void and(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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void call_label(codeblock_t* cb, size_t label_idx);
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void call(codeblock_t* cb, x86opnd_t opnd);
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void cmp(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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@ -234,10 +235,12 @@ void jmp(codeblock_t* cb, size_t label_idx);
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void jmp_rm(codeblock_t* cb, x86opnd_t opnd);
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void lea(codeblock_t* cb, x86opnd_t dst, x86opnd_t src);
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void mov(codeblock_t* cb, x86opnd_t dst, x86opnd_t src);
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void neg(codeblock_t* cb, x86opnd_t opnd);
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void nop(codeblock_t* cb, size_t length);
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void not(codeblock_t* cb, x86opnd_t opnd);
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void push(codeblock_t* cb, x86opnd_t reg);
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void or(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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void pop(codeblock_t* cb, x86opnd_t reg);
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void push(codeblock_t* cb, x86opnd_t reg);
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void ret(codeblock_t* cb);
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void sal(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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void sar(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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@ -30,7 +30,7 @@ void check_bytes(codeblock_t* cb, const char* bytes)
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if (cb_byte != byte)
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{
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fprintf(stderr, "incorrect encoding at position %ld, got %X, expected %X\n",
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fprintf(stderr, "incorrect encoding at position %ld, got %02X, expected %02X\n",
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i,
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(int)cb_byte,
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(int)byte
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@ -47,8 +47,6 @@ void run_tests()
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codeblock_t cb_obj;
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codeblock_t* cb = &cb_obj;
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cb_init(cb, 4096);
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cb_write_prologue(cb);
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cb_write_epilogue(cb);
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// add
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/*
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@ -82,6 +80,9 @@ void run_tests()
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cb_set_pos(cb, 0); add(cb, ECX, imm_opnd(8)); check_bytes(cb, "83C108");
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cb_set_pos(cb, 0); add(cb, ECX, imm_opnd(255)); check_bytes(cb, "81C1FF000000");
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// and
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cb_set_pos(cb, 0); and(cb, EBP, R12D); check_bytes(cb, "4421E5");
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// call
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{
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cb_set_pos(cb, 0);
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@ -212,6 +213,10 @@ void run_tests()
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);
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*/
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cb_set_pos(cb, 0); mov(cb, mem_opnd(8, RSP, 0), imm_opnd(-3)); check_bytes(cb, "C60424FD");
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cb_set_pos(cb, 0); mov(cb, mem_opnd(64, RDI, 8), imm_opnd(1)); check_bytes(cb, "48C7470801000000");
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// neg
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cb_set_pos(cb, 0); neg(cb, RAX); check_bytes(cb, "48F7D8");
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// nop
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cb_set_pos(cb, 0); nop(cb, 1); check_bytes(cb, "90");
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@ -295,12 +300,7 @@ void run_tests()
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*/
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// or
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/*
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test(
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delegate void (CodeBlock cb) { cb.or(X86Opnd(EDX), X86Opnd(ESI)); },
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"09F2"
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);
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*/
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cb_set_pos(cb, 0); or(cb, EDX, ESI); check_bytes(cb, "09F2");
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// pop
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cb_set_pos(cb, 0); pop(cb, RAX); check_bytes(cb, "58");
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@ -346,6 +346,14 @@ void run_tests()
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cb_set_pos(cb, 0); sub(cb, EAX, imm_opnd(1)); check_bytes(cb, "83E801");
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cb_set_pos(cb, 0); sub(cb, RAX, imm_opnd(2)); check_bytes(cb, "4883E802");
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/*
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// xor
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test(
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delegate void (CodeBlock cb) { cb.xor(X86Opnd(EAX), X86Opnd(EAX)); },
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"31C0"
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);
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*/
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printf("Assembler tests done\n");
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}
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@ -62,6 +62,11 @@ ujit_compile_insn(rb_iseq_t *iseq, size_t insn_idx)
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ujit_init();
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}
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if (cb->write_pos + 1024 >= cb->mem_size)
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{
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rb_bug("out of executable memory");
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}
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int insn = (int)iseq->body->iseq_encoded[insn_idx];
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int len = insn_len(insn);
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//const char* name = insn_name(insn);
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@ -74,6 +79,9 @@ ujit_compile_insn(rb_iseq_t *iseq, size_t insn_idx)
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uint8_t* code_ptr = &cb->mem_block[cb->write_pos];
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//printf("write pos: %ld\n", cb->write_pos);
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// Write the pre call bytes
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ujit_instr_entry(cb);
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// TODO: encode individual instructions, eg
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// nop, putnil, putobject, putself, pop, dup, getlocal, setlocal, nilp
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@ -81,9 +89,6 @@ ujit_compile_insn(rb_iseq_t *iseq, size_t insn_idx)
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// into separate functions
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if (insn == BIN(nop))
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{
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// Write the pre call bytes
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ujit_instr_entry(cb);
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//add(cb, RSI, imm_opnd(8)); // increment PC
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//mov(cb, mem_opnd(64, RDI, 0), RSI); // write new PC to EC object, not necessary for nop bytecode?
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//mov(cb, RAX, RSI); // return new PC
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@ -101,10 +106,34 @@ ujit_compile_insn(rb_iseq_t *iseq, size_t insn_idx)
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if (insn == BIN(pop))
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{
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// Write the pre call bytes
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ujit_instr_entry(cb);
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// Decrement SP
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sub(cb, mem_opnd(64, RDI, 8), imm_opnd(8));
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sub(cb, mem_opnd(64, RDI, 8), imm_opnd(8)); // decrement SP
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// Directly return the next PC, which is a constant
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mov(cb, RAX, const_ptr_opnd(next_pc));
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// Write the post call bytes
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ujit_instr_exit(cb);
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addr2insn_bookkeeping(code_ptr, insn);
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return code_ptr;
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}
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if (insn == BIN(putobject_INT2FIX_0_) || insn == BIN(putobject_INT2FIX_1_))
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{
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// Load current SP into RAX
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mov(cb, RAX, mem_opnd(64, RDI, 8));
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// Write constant at SP
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int cst = (insn == BIN(putobject_INT2FIX_0_))? 0:1;
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mov(cb, mem_opnd(64, RAX, 0), imm_opnd(INT2FIX(cst)));
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// Load incremented SP into RCX
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lea(cb, RCX, mem_opnd(64, RAX, 8));
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// Write back incremented SP
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mov(cb, mem_opnd(64, RDI, 8), RCX);
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// Directly return the next PC, which is a constant
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mov(cb, RAX, const_ptr_opnd(next_pc));
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