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Added RUBY_VM_CHECK_INTS to CFUNC calls
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parent
5b6a963b71
commit
8b8470d098
4 changed files with 37 additions and 17 deletions
39
ujit_asm.c
39
ujit_asm.c
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@ -1507,26 +1507,39 @@ void sub(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1)
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}
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/// test - Logical Compare
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void test(codeblock_t* cb, x86opnd_t rm_opnd, x86opnd_t imm_opnd)
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void test(codeblock_t* cb, x86opnd_t rm_opnd, x86opnd_t test_opnd)
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{
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assert (rm_opnd.type == OPND_REG || rm_opnd.type == OPND_MEM);
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assert (imm_opnd.type == OPND_IMM);
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assert (imm_opnd.as.imm >= 0);
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assert (unsig_imm_size(imm_opnd.as.unsig_imm) <= 32);
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assert (unsig_imm_size(imm_opnd.as.unsig_imm) <= rm_opnd.num_bits);
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assert (test_opnd.type == OPND_REG || test_opnd.type == OPND_IMM);
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// Use the smallest operand size possible
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rm_opnd = resize_opnd(rm_opnd, unsig_imm_size(imm_opnd.as.unsig_imm));
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if (rm_opnd.num_bits == 8)
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// If the second operand is an immediate
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if (test_opnd.type == OPND_IMM)
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{
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cb_write_rm(cb, false, false, NO_OPND, rm_opnd, 0x00, 1, 0xF6);
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cb_write_int(cb, imm_opnd.as.imm, rm_opnd.num_bits);
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x86opnd_t imm_opnd = test_opnd;
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assert (imm_opnd.as.imm >= 0);
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assert (unsig_imm_size(imm_opnd.as.unsig_imm) <= 32);
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assert (unsig_imm_size(imm_opnd.as.unsig_imm) <= rm_opnd.num_bits);
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// Use the smallest operand size possible
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rm_opnd = resize_opnd(rm_opnd, unsig_imm_size(imm_opnd.as.unsig_imm));
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if (rm_opnd.num_bits == 8)
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{
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cb_write_rm(cb, false, false, NO_OPND, rm_opnd, 0x00, 1, 0xF6);
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cb_write_int(cb, imm_opnd.as.imm, rm_opnd.num_bits);
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}
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else
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{
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cb_write_rm(cb, rm_opnd.num_bits == 16, false, NO_OPND, rm_opnd, 0x00, 1, 0xF7);
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cb_write_int(cb, imm_opnd.as.imm, rm_opnd.num_bits);
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}
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}
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else
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{
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cb_write_rm(cb, rm_opnd.num_bits == 16, false, NO_OPND, rm_opnd, 0x00, 1, 0xF7);
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cb_write_int(cb, imm_opnd.as.imm, rm_opnd.num_bits);
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// For now, 32-bit operands only
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assert (test_opnd.num_bits == rm_opnd.num_bits);
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assert (test_opnd.num_bits == 32);
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cb_write_rm(cb, false, false, test_opnd, rm_opnd, 0xFF, 1, 0x85);
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}
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}
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@ -372,7 +372,7 @@ void sar(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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void shl(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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void shr(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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void sub(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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void test(codeblock_t* cb, x86opnd_t rm_opnd, x86opnd_t imm_opnd);
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void test(codeblock_t* cb, x86opnd_t rm_opnd, x86opnd_t test_opnd);
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void ud2(codeblock_t* cb);
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void xor(codeblock_t* cb, x86opnd_t opnd0, x86opnd_t opnd1);
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@ -314,6 +314,7 @@ void run_tests()
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cb_set_pos(cb, 0); test(cb, mem_opnd(8, RSI, 0), imm_opnd(1)); check_bytes(cb, "F60601");
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cb_set_pos(cb, 0); test(cb, mem_opnd(8, RSI, 16), imm_opnd(1)); check_bytes(cb, "F6461001");
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cb_set_pos(cb, 0); test(cb, mem_opnd(8, RSI, -16), imm_opnd(1)); check_bytes(cb, "F646F001");
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cb_set_pos(cb, 0); test(cb, mem_opnd(32, RSI, 64), EAX); check_bytes(cb, "854640");
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// xor
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cb_set_pos(cb, 0); xor(cb, EAX, EAX); check_bytes(cb, "31C0");
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@ -63,6 +63,8 @@ static codeblock_t* ocb = NULL;
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// Scratch registers used by MicroJIT
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#define REG0 RAX
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#define REG1 RCX
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#define REG0_32 EAX
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#define REG1_32 ECX
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// Keep track of mapping from instructions to generated code
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// See comment for rb_encoded_insn_data in iseq.c
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@ -537,6 +539,13 @@ gen_opt_send_without_block(codeblock_t* cb, codeblock_t* ocb, ctx_t* ctx)
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// Create a size-exit to fall back to the interpreter
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uint8_t* side_exit = ujit_side_exit(ocb, ctx, ctx->pc);
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// Check for interrupts
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// RUBY_VM_CHECK_INTS(ec)
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mov(cb, REG0_32, member_opnd(REG_EC, rb_execution_context_t, interrupt_mask));
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not(cb, REG0_32);
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test(cb, member_opnd(REG_EC, rb_execution_context_t, interrupt_flag), REG0_32);
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jnz_ptr(cb, side_exit);
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// Points to the receiver operand on the stack
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x86opnd_t recv = ctx_stack_opnd(ctx, argc);
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mov(cb, REG0, recv);
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@ -683,9 +692,6 @@ gen_opt_send_without_block(codeblock_t* cb, codeblock_t* ocb, ctx_t* ctx)
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x86opnd_t stack_ret = ctx_stack_push(ctx, 1);
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mov(cb, stack_ret, RAX);
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// TODO: later
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// RUBY_VM_CHECK_INTS(ec);
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// Pop the stack frame (ec->cfp++)
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add(
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cb,
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