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6ef46f71c7
Enable arm64 optimizations that exist for power/x86 (#3393) * Enable unaligned accesses on arm64 64-bit Arm platforms support unaligned accesses. Running the string benchmarks this change improves performance by an average of 1.04x, min .96x, max 1.21x, median 1.01x * arm64 enable gc optimizations Similar to x86 and powerpc optimizations. | |compare-ruby|built-ruby| |:------|-----------:|---------:| |hash1 | 0.225| 0.237| | | -| 1.05x| |hash2 | 0.110| 0.110| | | 1.00x| -| * vm_exec.c: improve performance for arm64 | |compare-ruby|built-ruby| |:------------------------------|-----------:|---------:| |vm_array | 26.501M| 27.959M| | | -| 1.06x| |vm_attr_ivar | 21.606M| 31.429M| | | -| 1.45x| |vm_attr_ivar_set | 21.178M| 26.113M| | | -| 1.23x| |vm_backtrace | 6.621| 6.668| | | -| 1.01x| |vm_bigarray | 26.205M| 29.958M| | | -| 1.14x| |vm_bighash | 504.155k| 479.306k| | | 1.05x| -| |vm_block | 16.692M| 21.315M| | | -| 1.28x| |block_handler_type_iseq | 5.083| 7.004| | | -| 1.38x| --- gc.c | 13 +++++++++++++ gc.h | 2 ++ include/ruby/internal/config.h | 2 ++ regint.h | 2 +- siphash.c | 2 +- st.c | 2 +- vm_exec.c | 8 ++++++++ 7 files changed, 28 insertions(+), 3 deletions(-)
175 lines
3.8 KiB
C
175 lines
3.8 KiB
C
/* -*-c-*- */
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/**********************************************************************
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vm_exec.c -
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$Author$
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Copyright (C) 2004-2007 Koichi Sasada
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**********************************************************************/
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#include <math.h>
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#if VM_COLLECT_USAGE_DETAILS
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static void vm_analysis_insn(int insn);
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#endif
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#if VMDEBUG > 0
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#define DECL_SC_REG(type, r, reg) register type reg_##r
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#elif defined(__GNUC__) && defined(__x86_64__)
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#define DECL_SC_REG(type, r, reg) register type reg_##r __asm__("r" reg)
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#elif defined(__GNUC__) && defined(__i386__)
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#define DECL_SC_REG(type, r, reg) register type reg_##r __asm__("e" reg)
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#elif defined(__GNUC__) && defined(__powerpc64__)
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#define DECL_SC_REG(type, r, reg) register type reg_##r __asm__("r" reg)
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#elif defined(__GNUC__) && defined(__aarch64__)
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#define DECL_SC_REG(type, r, reg) register type reg_##r __asm__("x" reg)
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#else
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#define DECL_SC_REG(type, r, reg) register type reg_##r
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#endif
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/* #define DECL_SC_REG(r, reg) VALUE reg_##r */
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#if VM_DEBUG_STACKOVERFLOW
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NORETURN(static void vm_stack_overflow_for_insn(void));
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static void
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vm_stack_overflow_for_insn(void)
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{
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rb_bug("CHECK_VM_STACK_OVERFLOW_FOR_INSN: should not overflow here. "
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"Please contact ruby-core/dev with your (a part of) script. "
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"This check will be removed soon.");
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}
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#endif
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#if !OPT_CALL_THREADED_CODE
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static VALUE
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vm_exec_core(rb_execution_context_t *ec, VALUE initial)
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{
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#if OPT_STACK_CACHING
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#if 0
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#elif __GNUC__ && __x86_64__
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DECL_SC_REG(VALUE, a, "12");
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DECL_SC_REG(VALUE, b, "13");
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#else
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register VALUE reg_a;
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register VALUE reg_b;
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#endif
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#endif
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#if defined(__GNUC__) && defined(__i386__)
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DECL_SC_REG(const VALUE *, pc, "di");
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DECL_SC_REG(rb_control_frame_t *, cfp, "si");
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#define USE_MACHINE_REGS 1
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#elif defined(__GNUC__) && defined(__x86_64__)
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DECL_SC_REG(const VALUE *, pc, "14");
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DECL_SC_REG(rb_control_frame_t *, cfp, "15");
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#define USE_MACHINE_REGS 1
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#elif defined(__GNUC__) && defined(__powerpc64__)
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DECL_SC_REG(const VALUE *, pc, "14");
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DECL_SC_REG(rb_control_frame_t *, cfp, "15");
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#define USE_MACHINE_REGS 1
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#elif defined(__GNUC__) && defined(__aarch64__)
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DECL_SC_REG(const VALUE *, pc, "19");
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DECL_SC_REG(rb_control_frame_t *, cfp, "20");
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#define USE_MACHINE_REGS 1
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#else
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register rb_control_frame_t *reg_cfp;
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const VALUE *reg_pc;
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#endif
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#if USE_MACHINE_REGS
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#undef RESTORE_REGS
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#define RESTORE_REGS() \
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{ \
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VM_REG_CFP = ec->cfp; \
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reg_pc = reg_cfp->pc; \
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}
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#undef VM_REG_PC
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#define VM_REG_PC reg_pc
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#undef GET_PC
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#define GET_PC() (reg_pc)
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#undef SET_PC
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#define SET_PC(x) (reg_cfp->pc = VM_REG_PC = (x))
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#endif
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#if OPT_TOKEN_THREADED_CODE || OPT_DIRECT_THREADED_CODE
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#include "vmtc.inc"
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if (UNLIKELY(ec == 0)) {
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return (VALUE)insns_address_table;
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}
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#endif
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reg_cfp = ec->cfp;
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reg_pc = reg_cfp->pc;
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#if OPT_STACK_CACHING
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reg_a = initial;
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reg_b = 0;
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#endif
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first:
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INSN_DISPATCH();
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/*****************/
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#include "vm.inc"
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/*****************/
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END_INSNS_DISPATCH();
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/* unreachable */
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rb_bug("vm_eval: unreachable");
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goto first;
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}
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const void **
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rb_vm_get_insns_address_table(void)
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{
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return (const void **)vm_exec_core(0, 0);
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}
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#else /* OPT_CALL_THREADED_CODE */
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#include "vm.inc"
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#include "vmtc.inc"
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const void **
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rb_vm_get_insns_address_table(void)
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{
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return (const void **)insns_address_table;
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}
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static VALUE
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vm_exec_core(rb_execution_context_t *ec, VALUE initial)
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{
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register rb_control_frame_t *reg_cfp = ec->cfp;
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rb_thread_t *th;
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while (1) {
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reg_cfp = ((rb_insn_func_t) (*GET_PC()))(ec, reg_cfp);
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if (UNLIKELY(reg_cfp == 0)) {
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break;
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}
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}
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if ((th = rb_ec_thread_ptr(ec))->retval != Qundef) {
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VALUE ret = th->retval;
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th->retval = Qundef;
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return ret;
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}
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else {
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VALUE err = ec->errinfo;
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ec->errinfo = Qnil;
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return err;
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}
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}
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#endif
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