mirror of
https://gitlab.com/bztsrc/bootboot.git
synced 2023-02-13 20:54:32 -05:00
More SMP
This commit is contained in:
parent
26e28a2558
commit
c8580afba8
7 changed files with 101 additions and 45 deletions
BIN
dist/bootboot.bin
vendored
BIN
dist/bootboot.bin
vendored
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BIN
dist/bootboot.efi
vendored
BIN
dist/bootboot.efi
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BIN
dist/bootboot.img
vendored
BIN
dist/bootboot.img
vendored
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BIN
dist/bootboot.rom
vendored
BIN
dist/bootboot.rom
vendored
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File diff suppressed because one or more lines are too long
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@ -1,9 +1,9 @@
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/* generated by bin2h, do not edit */
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extern unsigned char binary_boot_bin[512];
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extern unsigned char binary_bootboot_bin[12800];
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extern unsigned char binary_bootboot_efi[102561];
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extern unsigned char binary_bootboot_img[35064];
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extern unsigned char binary_bootboot_bin[13312];
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extern unsigned char binary_bootboot_efi[103073];
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extern unsigned char binary_bootboot_img[34912];
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extern unsigned char binary_bootboot_rv64[8192];
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extern unsigned char binary_LICENCE_broadcom[1594];
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extern unsigned char binary_bootcode_bin[52456];
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@ -844,9 +844,9 @@ ap_start: xor ax, ax
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mov eax, cr0
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or al, 1
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mov cr0, eax
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jmp CODE_PROT:@f
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jmp CODE_PROT:ap_prot
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USE32
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@@: mov ax, DATA_PROT
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ap_prot: mov ax, DATA_PROT
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mov ds, ax
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mov es, ax
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mov fs, ax
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@ -858,7 +858,11 @@ ap_start: xor ax, ax
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mov eax, dword [esi]
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or ah, 1h
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mov dword [esi], eax
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lock inc byte [ap_done]
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mov ecx, 1Bh ; enable APIC MSR
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rdmsr
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bt eax, 1
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wrmsr
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lock inc word [ap_done]
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; spinlock until BSP finishes
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@@: pause
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cmp byte [bsp_done], 0
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@ -2020,13 +2024,15 @@ end if
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jne @f
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mov al, byte [ebx+4] ; madt_entry.lapicproc.flag & ENABLED
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and al, 1
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jz @f
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jz .badmadt
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xor ax, ax
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mov al, byte [ebx+3] ; madt_entry.lapicproc.lapicid
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cmp al, 0FFh
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je @f
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je .badmadt
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stosw ; ACPI table holds 1 byte id, but internally we have 2 bytes
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inc word [numcores]
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jmp @f
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.badmadt: mov byte [bad_madt], 1
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@@: xor eax, eax
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mov al, byte [ebx+1] ; madt_entry.size
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or al, al
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@ -2335,30 +2341,6 @@ end if
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dec ecx
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jnz @b
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;generate new 64 bit gdt
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mov edi, GDT_table+8
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;8h core code
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xor eax, eax ;supervisor mode (ring 0)
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mov ax, 0FFFFh
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stosd
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mov eax, 00209800h
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stosd
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;10h core data
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xor eax, eax ;flat data segment
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mov ax, 0FFFFh
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stosd
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mov eax, 00809200h
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stosd
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;18h mandatory tss
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xor eax, eax ;required by vt-x
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mov al, 068h
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stosd
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mov eax, 00008900h
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stosd
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xor eax, eax
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stosd
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stosd
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mov al, 0FFh ;disable PIC
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out 021h, al
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out 0A1h, al
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@ -2378,6 +2360,13 @@ end if
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mov ecx, (ap_start-ap_trampoline+3)/4
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repnz movsd
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; disable ICMR
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mov al, 070h
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out 22h, al
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in al, 23h
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or al, 1
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out 23h, al
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; enable Local APIC
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mov esi, dword [lapic_ptr]
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add esi, 0D0h ; logical destination
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@ -2400,12 +2389,61 @@ end if
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bt eax, 1
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wrmsr
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mov al, 0fh ; CMOS warm reset code 0A
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out 70h, al
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mov al, 0ah
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out 71h, al
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mov dword [467h], 07000000h ; warm reset vector
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; make sure we use the correct Local APIC ID for the BSP
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sub esi, 60h
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mov esi, dword [lapic_ptr]
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add esi, 020h
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mov eax, dword [esi]
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shr eax, 24
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mov word [bootboot.bspid], ax
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; use broadcast IPI if MADT is okay (no bcast id and all CPUs enabled)
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cmp byte [bad_madt], 0
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jnz .onebyone
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; send Broadcast INIT IPI
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mov esi, dword [lapic_ptr]
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add esi, 300h
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mov eax, 0C4500h
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mov dword [esi], eax
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; wait 10 millisec
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prot_sleep 50
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; send Broadcast STARTUP IPI
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mov eax, 0C4607h
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mov dword [esi], eax
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; wait 200 microsec
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prot_sleep 1
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; send second STARTUP IPI
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mov eax, 0C4607h
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mov dword [esi], eax
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; wait 200 microsec
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prot_sleep 1
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; wait for APs with 100 millisec timeout
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mov ecx, 500
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rdtsc
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mov dword [gpt_ptr], eax
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mov dword [gpt_ptr+4], edx
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mov eax, dword [ncycles]
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mov edx, dword [ncycles+4]
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mul ecx
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add dword [gpt_ptr], eax
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adc dword [gpt_ptr+4], edx
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mov cx, word [numcores]
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@@: pause
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cmp word [ap_done], cx
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je .nosmp
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rdtsc
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cmp dword [gpt_ptr+4], edx
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jl @b
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cmp dword [gpt_ptr], eax
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jl @b
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jmp .nosmp
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.onebyone:
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; send IPIs to specific cores one by one
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xor edx, edx
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.initcore: cmp dx, word [numcores]
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@ -2419,12 +2457,6 @@ end if
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je .initcore
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shl ebx, 24
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mov al, 0fh ; CMOS warm reset code 0A
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out 70h, al
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mov al, 0ah
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out 71h, al
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mov dword [467h], 07000000h ; warm reset vector
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; clear APIC error
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mov esi, dword [lapic_ptr]
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add esi, 280h
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@ -2485,7 +2517,7 @@ end if
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je .nextcore
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shl ebx, 24
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mov byte [ap_done], 0
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mov word [ap_done], 0
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; select AP
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mov esi, dword [lapic_ptr]
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prot_sleep 1
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; do we need a second SIPI?
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cmp byte [ap_done], 0
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cmp word [ap_done], 0
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jnz .nextcore
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; select AP
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@ -2534,6 +2566,29 @@ end if
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prot_sleep 1
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jmp .nextcore
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.nosmp:
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;generate new 64 bit gdt
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mov edi, GDT_table+8
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;8h core code
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xor eax, eax ;supervisor mode (ring 0)
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mov ax, 0FFFFh
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stosd
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mov eax, 00209800h
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stosd
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;10h core data
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xor eax, eax ;flat data segment
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mov ax, 0FFFFh
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stosd
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mov eax, 00809200h
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stosd
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;18h mandatory tss
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xor eax, eax ;required by vt-x
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mov al, 068h
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stosd
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mov eax, 00008900h
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stosd
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xor eax, eax
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stosd
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stosd
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;Enter long mode
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cli
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iscdrom: db 0
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nosmp: db 0
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numcores: dw 0
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ap_done: db 0
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bad_madt:
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ap_done: dw 0
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bsp_done: db 0 ;flag to indicate APs can run
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fattype: db 0
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bkp: dd ' '
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