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mirror of https://gitlab.com/bztsrc/bootboot.git synced 2023-02-13 20:54:32 -05:00

Initial support for 64 bit coreboot

This commit is contained in:
bzt 2020-10-02 20:36:33 +02:00
parent 292e4b5acd
commit df849eaad9
2 changed files with 36 additions and 3 deletions

View file

@ -70,7 +70,11 @@
#define INITRD_BASE ((CONFIG_LP_BASE_ADDRESS + 1024*1024 + CONFIG_LP_HEAP_SIZE + PAGESIZE-1) & ~(PAGESIZE-1))
extern void ap_trampoline();
#if __WORDSIZE == 64
extern void bsp64_init();
#else
extern void bsp_init();
#endif
/*** ELF64 defines and structs ***/
#define ELFMAG "\177ELF"
@ -663,7 +667,7 @@ void LoadCore()
for(s = sym, i = 0; i<(strtable-(char*)sym)/syment && s->st_name < strsz; i++, s++) {
if(!memcmp(strtable + s->st_name, "bootboot", 9)) bb_addr = s->st_value;
if(!memcmp(strtable + s->st_name, "environment", 12)) env_addr = s->st_value;
if(!memcmp(strtable + s->st_name, "mmio", 4)) mm_addr = s->st_value;
if(!memcmp(strtable + s->st_name, "mmio", 5)) mm_addr = s->st_value;
if(!memcmp(strtable + s->st_name, "fb", 3)) fb_addr = s->st_value;
}
}
@ -686,7 +690,7 @@ void LoadCore()
name = !s->iszero ? (char*)&s->iszero : strtable + s->nameoffs;
if(!memcmp(name, "bootboot", 9)) bb_addr = (int64_t)s->value;
if(!memcmp(name, "environment", 12)) env_addr = (int64_t)s->value;
if(!memcmp(name, "mmio", 4)) mm_addr = (int64_t)s->value;
if(!memcmp(name, "mmio", 5)) mm_addr = (int64_t)s->value;
if(!memcmp(name, "fb", 3)) fb_addr = (int64_t)s->value;
i += s->auxsyms;
}
@ -1221,7 +1225,10 @@ gzerr: panic("Unable to uncompress");
}
/* continue in Assembly, enable long mode and jump to kernel's entry point */
#if __WORDSIZE == 64
bsp64_init();
#else
bsp_init();
#endif
return 0;
}

View file

@ -30,6 +30,7 @@
.globl ap_trampoline
.globl bsp_init
.globl bsp64_init
.extern lapic_ids
.text
@ -93,8 +94,10 @@ GDT_value:
/*****************************************************************************
* things to do on BSP *
*****************************************************************************/
/* these are 32 bit encoded instructions */
bsp_init:
cli
cld
movb $0xFF, %al // disable PIC
outb %al, $0x21
outb %al, $0xA1
@ -121,7 +124,29 @@ longmode_init:
movl %eax, %cr0
lgdt GDT_value
ljmp $8, $bit64
.code64
/* similar code to above, but these are 64 bit encoded, only needed on BSP if coreboot is compiled for x86_64 */
bsp64_init:
cli
cld
movb $0xFF, %al // disable PIC
outb %al, $0x21
outb %al, $0xA1
inb $0x70, %al // disable NMI
orb $0x80, %al
outb %al, $0x70
incb 0x1010 // release AP spin lock
movl $0x368, %eax // Set PAE, MCE, PGE; OSFXSR, OSXMMEXCPT (enable SSE)
movl %eax, %cr4
movl $0x4000, %eax
movl %eax, %cr3
movl $0x0C0000080, %ecx // EFR MSR
movl $0x0C0000011, %eax // clear EM, MP (enable SSE) and WP
movl %eax, %cr0
lgdt GDT_value
ljmp $8, $bit64
bit64:
movl $0x10, %eax // load long mode segments
movw %ax, %ds
@ -143,6 +168,7 @@ bit64:
// set stack and call _start() in sys/core
xorq %rsp, %rsp // sp = core_num * -1024
subq %rax, %rsp
xorq %rsi, %rsi
movl $entrypoint, %esi // GAS does not allow "jmp qword[entrypoint]"
lodsq
jmp *%rax