mirror of
https://gitlab.com/bztsrc/bootboot.git
synced 2023-02-13 20:54:32 -05:00
203 lines
6.1 KiB
ArmAsm
203 lines
6.1 KiB
ArmAsm
/*
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* x86_64-cb/smp.S
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*
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* Copyright (C) 2017 - 2021 bzt (bztsrc@gitlab)
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* This file is part of the BOOTBOOT Protocol package.
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* @brief SMP and long mode initialization code.
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*
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*/
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.globl ap_trampoline
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.globl bsp_init
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.globl bsp64_init
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.extern lapic_ids
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.extern lapic_addr
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.extern initstack
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.text
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/*****************************************************************************
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* things to do on the APs *
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*****************************************************************************/
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.align 128
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.code16
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/* this code will be relocated to 0x1000 - 0x1100 */
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ap_trampoline:
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cli
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cld
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ljmp $0, $0x1040
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.align 16
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// prot mode GDT
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_L1010_GDT_table:
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.long 0, 0
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.long 0x0000FFFF, 0x00CF9A00 // flat code
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.long 0x0000FFFF, 0x008F9200 // flat data
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.long 0x00000068, 0x00CF8900 // tss, not used but required by VB's vt-x
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_L1030_GDT_value:
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.word _L1030_GDT_value - _L1010_GDT_table - 1
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.long 0x1010
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.long 0, 0
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.align 64
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_L1040:
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xorw %ax, %ax
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movw %ax, %ds
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lgdtl 0x1030
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movl %cr0, %eax
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orl $1, %eax
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movl %eax, %cr0
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ljmp $8, $0x1060
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.align 32
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.code32
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_L1060:
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movw $16, %ax
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movw %ax, %ds
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incb 0x1011
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// spinlock until BSP finishes
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1: pause
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cmpb $0, 0x1010
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jz 1b
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// jump back to non-relocated code segment
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ljmp $8, $longmode_init
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.align 128
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ap_trampoline_end:
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// long mode GDT (here it is aligned and out of execution flow)
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GDT_table:
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.long 0, 0
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.long 0x0000FFFF, 0x00209800 // flat code, ring 0
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.long 0x0000FFFF, 0x00809200 // flat data
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.long 0x00000068, 0x00008900 // tss, required by vt-x
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.long 0, 0
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GDT_value:
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.word GDT_value - GDT_table - 1
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.long GDT_table, 0, 0
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.word 0
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.align 8
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stack64:
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.long bootboot_startcore
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.long 0
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.quad 8
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/*****************************************************************************
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* things to do on BSP *
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*****************************************************************************/
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/* these are 32 bit encoded instructions */
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bsp_init:
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cli
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cld
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movb $0xFF, %al // disable PIC
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outb %al, $0x21
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outb %al, $0xA1
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inb $0x70, %al // disable NMI
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orb $0x80, %al
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outb %al, $0x70
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incb 0x1010 // release AP spin lock
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// fall into long mode initialization code
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/*****************************************************************************
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* common code for all cores, enable long mode and start kernel *
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*****************************************************************************/
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longmode_init:
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// enable lapic and find our lapic id
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movl lapic_addr, %edi
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or %edi, %edi
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jz 1f
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addl $0xF0, %edi
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movl (%edi), %eax
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or $0x1, %ah
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movl %eax, (%edi)
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subl $0xD0, %edi
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movl (%edi), %edi
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shrl $24, %edi
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1: // do not clobber di
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movl $0x368, %eax // Set PAE, MCE, PGE; OSFXSR, OSXMMEXCPT (enable SSE)
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movl %eax, %cr4
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movl $0x4000, %eax
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movl %eax, %cr3
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movl $0x0C0000080, %ecx // EFR MSR
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rdmsr
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orl $0x100, %eax // enable long mode
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wrmsr
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movl $0x0C0000011, %eax // clear EM, MP (enable SSE) and WP
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movl %eax, %cr0
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lgdt GDT_value
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ljmp $8, $bootboot_startcore
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.code64
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/* similar code to above, but these are 64 bit encoded, only needed on BSP if coreboot is compiled for x86_64 */
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bsp64_init:
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// do not clobber di
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cli
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cld
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movb $0xFF, %al // disable PIC
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outb %al, $0x21
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outb %al, $0xA1
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inb $0x70, %al // disable NMI
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orb $0x80, %al
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outb %al, $0x70
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incb 0x1010 // release AP spin lock
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xorq %rax, %rax
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movl $0xC0000011, %eax // enable SSE
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movq %rax, %cr0
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movq %cr4, %rax
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orw $3 << 8, %ax
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mov %rax, %cr4
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movl $0x4000, %eax // set up paging
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movq %rax, %cr3
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xorq %rax, %rax
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movl $GDT_value, %eax
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lgdt (%rax)
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movl $stack64, %eax // reload CS, that's tricky in long mode because ljmp doesn't work
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movq %rax, %rsp
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lretq
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/* IN: di = apic id of current core */
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bootboot_startcore:
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movl $0x10, %eax // load long mode segments
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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movw %ax, %fs
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movw %ax, %gs
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movzwq %di, %rbx
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shll $1, %ebx // ebx = lapic id * 2
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addl $lapic_ids, %ebx
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xorq %rax, %rax
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movw (%rbx), %ax // ax = word[lapic_ids + lapic id * 2]
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movl $initstack, %ebx
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movl (%rbx), %ebx
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movzwq %ax, %rdi
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mulq %rbx // 1k stack for each core
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// set stack and call _start() in sys/core
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xorq %rsp, %rsp // sp = core_num * -initstack
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subq %rax, %rsp
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xorq %rsi, %rsi
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movl $entrypoint, %esi // GAS does not allow "jmp qword[entrypoint]"
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lodsq
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jmp *%rax
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hlt
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