109 lines
3.3 KiB
ArmAsm
109 lines
3.3 KiB
ArmAsm
/*
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* x86_64-efi/smp.S
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*
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* Copyright (C) 2017 - 2021 bzt (bztsrc@gitlab)
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* This file is part of the BOOTBOOT Protocol package.
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* @brief SMP initialization code.
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*
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*/
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.globl ap_trampoline
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.extern bootboot_startcode
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/*****************************************************************************
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* things to do on the APs *
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*****************************************************************************/
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.align 128
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.code16
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/* this code will be relocated to 0x8000 - 0x8100 */
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ap_trampoline:
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cli
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cld
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ljmp $0, $0x8040
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.align 16
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// prot mode GDT
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_L8010_GDT_table:
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.long 0, 0
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.long 0x0000FFFF, 0x00CF9A00 // flat code
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.long 0x0000FFFF, 0x008F9200 // flat data
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.long 0x00000068, 0x00CF8900 // tss, not used but required by VB's vt-x
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_L8030_GDT_value:
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.word _L8030_GDT_value - _L8010_GDT_table - 1
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.long 0x8010
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.long 0, 0
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.align 64
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_L8040:
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xorw %ax, %ax
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movw %ax, %ds
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lgdtl 0x8030
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movl %cr0, %eax
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orl $1, %eax
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movl %eax, %cr0
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ljmp $8, $0x8060
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.align 32
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.code32
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_L8060:
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movw $16, %ax
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movw %ax, %ds
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movw %ax, %ss
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movl $0x368, %eax // Set PAE, MCE, PGE; OSFXSR, OSXMMEXCPT (enable SSE)
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movl %eax, %cr4
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movl 0x80C0, %eax // let's hope it's in the first 4G...
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movl %eax, %cr3
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movl $0x0C0000080, %ecx // EFR MSR
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rdmsr
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orl $0x100, %eax // enable long mode
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wrmsr
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movl $0x0C0000011, %eax // clear EM, MP (enable SSE) and WP
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movl %eax, %cr0
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lgdtl 0x80E0
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movl $0x80C8, %esp // we can't use "ljmp $8, $0x80A0", because we don't know cs
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retf
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.align 32
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.code64
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_L80A0:
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movl 0x80D0, %eax // load long mode segments
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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movw %ax, %fs
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movw %ax, %gs
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// some linkers (GNU ld) generates bad relocation record for this
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// jmp bootboot_startcode
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movq 0x80D8, %rax
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jmp *%rax
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.align 32
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_L80C0_cr3_value:
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.long 0, 0
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.long 0x80A0
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_L80CC_cs_value:
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.long 0
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_L80D0_ds_value:
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.long 0, 0
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_L80D8_bootboot_startcore:
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.long 0, 0
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_L80E0_gdt_value:
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.long 0, 0, 0, 0
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ap_trampoline_end:
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