Relicense Sortix to the ISC license.
I hereby relicense all my work on Sortix under the ISC license as below.
All Sortix contributions by other people are already under this license,
are not substantial enough to be copyrightable, or have been removed.
All imported code from other projects is compatible with this license.
All GPL licensed code from other projects had previously been removed.
Copyright 2011-2016 Jonas 'Sortie' Termansen and contributors.
Permission to use, copy, modify, and distribute this software for any
purpose with or without fee is hereby granted, provided that the above
copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
2016-03-02 17:38:16 -05:00
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/*
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2016-09-05 18:22:00 -04:00
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* Copyright (c) 2011, 2016 Jonas 'Sortie' Termansen.
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Relicense Sortix to the ISC license.
I hereby relicense all my work on Sortix under the ISC license as below.
All Sortix contributions by other people are already under this license,
are not substantial enough to be copyrightable, or have been removed.
All imported code from other projects is compatible with this license.
All GPL licensed code from other projects had previously been removed.
Copyright 2011-2016 Jonas 'Sortie' Termansen and contributors.
Permission to use, copy, modify, and distribute this software for any
purpose with or without fee is hereby granted, provided that the above
copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
2016-03-02 17:38:16 -05:00
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* uart.cpp
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* A simple serial terminal driver.
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*/
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2011-08-05 08:25:00 -04:00
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2014-01-03 20:34:16 -05:00
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#include <stddef.h>
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#include <stdint.h>
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#include <string.h>
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2013-05-12 18:23:24 -04:00
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#include <sortix/kernel/cpu.h>
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2014-03-03 12:22:30 -05:00
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#include <sortix/kernel/ioport.h>
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2013-10-26 20:42:10 -04:00
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#include <sortix/kernel/kernel.h>
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2013-05-12 18:23:24 -04:00
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2011-08-05 08:25:00 -04:00
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#include "vga.h"
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#include "uart.h"
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2014-01-03 20:34:16 -05:00
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namespace Sortix {
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namespace UART {
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const unsigned TXR = 0; // Transmit register
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const unsigned RXR = 0; // Receive register
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const unsigned IER = 1; // Interrupt Enable
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const unsigned IIR = 2; // Interrupt ID
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const unsigned FCR = 2; // FIFO control
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const unsigned LCR = 3; // Line control
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const unsigned MCR = 4; // Modem control
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const unsigned LSR = 5; // Line Status
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const unsigned MSR = 6; // Modem Status
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const unsigned DLL = 0; // divisor Latch Low
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const unsigned DLM = 1; // divisor latch High
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const unsigned LCR_DLAB = 0x80; // divisor latch access bit
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const unsigned LCR_SBC = 0x40; // Set break control
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const unsigned LCR_SPAR = 0x20; // Stick parity (?)
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const unsigned LCR_EPAR = 0x10; // Even parity select
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const unsigned LCR_PARITY = 0x08; // Parity Enable
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const unsigned LCR_STOP = 0x04; // Stop bits: 0=1 bit, 1=2 bits
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const unsigned LCR_WLEN5 = 0x00; // Wordlength: 5 bits
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const unsigned LCR_WLEN6 = 0x01; // Wordlength: 6 bits
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const unsigned LCR_WLEN7 = 0x02; // Wordlength: 7 bits
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const unsigned LCR_WLEN8 = 0x03; // Wordlength: 8 bits
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const unsigned LSR_TEMT = 0x40; // Transmitter empty
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const unsigned LSR_THRE = 0x20; // Transmit-hold-register empty
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const unsigned LSR_READY = 0x1;
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const unsigned BASE_BAUD = 1843200 / 16;
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const unsigned BOTH_EMPTY = LSR_TEMT | LSR_THRE;
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unsigned ProbeBaud(unsigned port)
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{
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2014-03-03 12:22:30 -05:00
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uint8_t lcr = inport8(port + LCR);
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outport8(port + LCR, lcr | LCR_DLAB);
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uint8_t dll = inport8(port + DLL);
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uint8_t dlm = inport8(port + DLM);
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outport8(port + LCR, lcr);
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2014-01-03 20:34:16 -05:00
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unsigned quot = dlm << 8 | dll;
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return BASE_BAUD / quot;
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}
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void WaitForEmptyBuffers(unsigned port)
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{
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2014-03-03 12:22:30 -05:00
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while ( (inport8(port + LSR) & BOTH_EMPTY) != BOTH_EMPTY );
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2014-01-03 20:34:16 -05:00
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}
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const unsigned PORT = 0x3F8;
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void Init()
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2011-08-05 08:25:00 -04:00
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{
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2014-01-03 20:34:16 -05:00
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unsigned baud = ProbeBaud(PORT);
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2014-03-03 12:22:30 -05:00
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outport8(PORT + LCR, 0x3); // 8n1
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outport8(PORT + IER, 0); // No interrupt
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outport8(PORT + FCR, 0); // No FIFO
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outport8(PORT + MCR, 0x3); // DTR + RTS
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2014-01-03 20:34:16 -05:00
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unsigned divisor = 115200 / baud;
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2014-03-03 12:22:30 -05:00
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uint8_t c = inport8(PORT + LCR);
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outport8(PORT + LCR, c | LCR_DLAB);
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outport8(PORT + DLL, divisor >> 0 & 0xFF);
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outport8(PORT + DLM, divisor >> 8 & 0xFF);
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outport8(PORT + LCR, c & ~LCR_DLAB);
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2014-01-03 20:34:16 -05:00
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}
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void Read(uint8_t* buffer, size_t size)
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{
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// Save the IER and disable interrupts.
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2014-03-03 12:22:30 -05:00
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unsigned ier = inport8(PORT + IER);
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outport8(PORT + IER, 0);
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2014-01-03 20:34:16 -05:00
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for ( size_t i = 0; i < size; i++ )
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2011-08-05 08:25:00 -04:00
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{
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2014-03-03 12:22:30 -05:00
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while ( !(inport8(PORT + LSR) & LSR_READY) );
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buffer[i] = inport8(PORT);
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2011-08-05 08:25:00 -04:00
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}
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2014-01-03 20:34:16 -05:00
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(PORT);
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2014-03-03 12:22:30 -05:00
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outport8(PORT + IER, ier);
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2011-08-05 08:25:00 -04:00
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}
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2014-01-03 20:34:16 -05:00
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void Write(const void* b, size_t size)
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{
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const uint8_t* buffer = (const uint8_t*) b;
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// Save the IER and disable interrupts.
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2014-03-03 12:22:30 -05:00
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unsigned ier = inport8(PORT + IER);
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outport8(PORT + IER, 0);
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2014-01-03 20:34:16 -05:00
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for ( size_t i = 0; i < size; i++ )
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{
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WaitForEmptyBuffers(PORT);
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2014-03-03 12:22:30 -05:00
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outport8(PORT, buffer[i]);
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2014-01-03 20:34:16 -05:00
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}
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(PORT);
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2014-03-03 12:22:30 -05:00
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outport8(PORT + IER, ier);
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2014-01-03 20:34:16 -05:00
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}
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void WriteChar(char c)
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{
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// Save the IER and disable interrupts.
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2014-03-03 12:22:30 -05:00
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unsigned ier = inport8(PORT + IER);
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outport8(PORT + IER, 0);
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2014-01-03 20:34:16 -05:00
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WaitForEmptyBuffers(PORT);
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2014-03-03 12:22:30 -05:00
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outport8(PORT, c);
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2014-01-03 20:34:16 -05:00
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(PORT);
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2014-03-03 12:22:30 -05:00
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outport8(PORT + IER, ier);
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2014-01-03 20:34:16 -05:00
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}
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2016-09-05 18:22:00 -04:00
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void WriteString(const char* str)
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{
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Write(str, strlen(str));
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}
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static size_t WriteCallback(void*, const char* chars, size_t size)
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{
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Write(chars, size);
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return size;
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}
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void WriteF(const char* format, ...)
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{
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va_list list;
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va_start(list, format);
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vcbprintf(NULL, WriteCallback, format, list);
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va_end(list);
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}
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2014-01-03 20:34:16 -05:00
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int TryPopChar()
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{
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// Save the IER and disable interrupts.
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2014-03-03 12:22:30 -05:00
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unsigned ier = inport8(PORT + IER);
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outport8(PORT + IER, 0);
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2014-01-03 20:34:16 -05:00
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int result = -1;
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2014-03-03 12:22:30 -05:00
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if ( inport8(PORT + LSR) & LSR_READY )
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result = inport8(PORT);
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2014-01-03 20:34:16 -05:00
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(PORT);
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2014-03-03 12:22:30 -05:00
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outport8(PORT + IER, ier);
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2014-01-03 20:34:16 -05:00
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return result;
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}
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} // namespace UART
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} // namespace Sortix
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