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https://gitlab.com/sortix/sortix.git
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Update kernel/uart.{cpp,h} to current coding conventions.
This commit is contained in:
parent
c3f1550bba
commit
7a6b222e07
2 changed files with 152 additions and 163 deletions
293
kernel/uart.cpp
293
kernel/uart.cpp
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@ -22,164 +22,153 @@
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*******************************************************************************/
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*******************************************************************************/
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#include <stddef.h>
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#include <stdint.h>
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#include <string.h>
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#include <sortix/kernel/cpu.h>
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#include <sortix/kernel/cpu.h>
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#include <sortix/kernel/kernel.h>
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#include <sortix/kernel/kernel.h>
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#include <string.h>
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#include "vga.h"
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#include "vga.h"
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#include "uart.h"
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#include "uart.h"
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namespace Sortix
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namespace Sortix {
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namespace UART {
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const unsigned TXR = 0; // Transmit register
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const unsigned RXR = 0; // Receive register
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const unsigned IER = 1; // Interrupt Enable
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const unsigned IIR = 2; // Interrupt ID
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const unsigned FCR = 2; // FIFO control
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const unsigned LCR = 3; // Line control
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const unsigned MCR = 4; // Modem control
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const unsigned LSR = 5; // Line Status
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const unsigned MSR = 6; // Modem Status
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const unsigned DLL = 0; // divisor Latch Low
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const unsigned DLM = 1; // divisor latch High
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const unsigned LCR_DLAB = 0x80; // divisor latch access bit
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const unsigned LCR_SBC = 0x40; // Set break control
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const unsigned LCR_SPAR = 0x20; // Stick parity (?)
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const unsigned LCR_EPAR = 0x10; // Even parity select
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const unsigned LCR_PARITY = 0x08; // Parity Enable
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const unsigned LCR_STOP = 0x04; // Stop bits: 0=1 bit, 1=2 bits
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const unsigned LCR_WLEN5 = 0x00; // Wordlength: 5 bits
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const unsigned LCR_WLEN6 = 0x01; // Wordlength: 6 bits
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const unsigned LCR_WLEN7 = 0x02; // Wordlength: 7 bits
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const unsigned LCR_WLEN8 = 0x03; // Wordlength: 8 bits
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const unsigned LSR_TEMT = 0x40; // Transmitter empty
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const unsigned LSR_THRE = 0x20; // Transmit-hold-register empty
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const unsigned LSR_READY = 0x1;
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const unsigned BASE_BAUD = 1843200 / 16;
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const unsigned BOTH_EMPTY = LSR_TEMT | LSR_THRE;
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unsigned ProbeBaud(unsigned port)
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{
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{
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namespace UART
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uint8_t lcr = CPU::InPortB(port + LCR);
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{
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CPU::OutPortB(port + LCR, lcr | LCR_DLAB);
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const unsigned TXR = 0; // Transmit register
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uint8_t dll = CPU::InPortB(port + DLL);
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const unsigned RXR = 0; // Receive register
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uint8_t dlm = CPU::InPortB(port + DLM);
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const unsigned IER = 1; // Interrupt Enable
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CPU::OutPortB(port + LCR, lcr);
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const unsigned IIR = 2; // Interrupt ID
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unsigned quot = dlm << 8 | dll;
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const unsigned FCR = 2; // FIFO control
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const unsigned LCR = 3; // Line control
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const unsigned MCR = 4; // Modem control
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const unsigned LSR = 5; // Line Status
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const unsigned MSR = 6; // Modem Status
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const unsigned DLL = 0; // Divisor Latch Low
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const unsigned DLM = 1; // Divisor latch High
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const unsigned LCR_DLAB = 0x80; // Divisor latch access bit
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return BASE_BAUD / quot;
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const unsigned LCR_SBC = 0x40; // Set break control
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const unsigned LCR_SPAR = 0x20; // Stick parity (?)
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const unsigned LCR_EPAR = 0x10; // Even parity select
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const unsigned LCR_PARITY = 0x08; // Parity Enable
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const unsigned LCR_STOP = 0x04; // Stop bits: 0=1 bit, 1=2 bits
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const unsigned LCR_WLEN5 = 0x00; // Wordlength: 5 bits
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const unsigned LCR_WLEN6 = 0x01; // Wordlength: 6 bits
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const unsigned LCR_WLEN7 = 0x02; // Wordlength: 7 bits
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const unsigned LCR_WLEN8 = 0x03; // Wordlength: 8 bits
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const unsigned LSR_TEMT = 0x40; // Transmitter empty
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const unsigned LSR_THRE = 0x20; // Transmit-hold-register empty
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const unsigned LSR_READY = 0x1;
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const unsigned Port = 0x3f8;
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const unsigned BASE_BAUD = 1843200/16;
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const unsigned BOTH_EMPTY = LSR_TEMT | LSR_THRE;
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unsigned ProbeBaud(unsigned Port)
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{
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uint8_t lcr = CPU::InPortB(Port + LCR);
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CPU::OutPortB(Port + LCR, lcr | LCR_DLAB);
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uint8_t dll = CPU::InPortB(Port + DLL);
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uint8_t dlm = CPU::InPortB(Port + DLM);
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CPU::OutPortB(Port + LCR, lcr);
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unsigned quot = (dlm << 8) | dll;
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return BASE_BAUD / quot;
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}
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void WaitForEmptyBuffers(unsigned Port)
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{
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while ( true )
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{
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unsigned Status = CPU::InPortB(Port + LSR);
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if ( (Status & BOTH_EMPTY) == BOTH_EMPTY )
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{
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return;
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}
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}
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}
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unsigned Baud;
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void Init()
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{
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Baud = ProbeBaud(Port);
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CPU::OutPortB(Port + LCR, 0x3); // 8n1
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CPU::OutPortB(Port + IER, 0); // No interrupt
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CPU::OutPortB(Port + FCR, 0); // No FIFO
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CPU::OutPortB(Port + MCR, 0x3); // DTR + RTS
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unsigned Divisor = 115200 / Baud;
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uint8_t C = CPU::InPortB(Port + LCR);
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CPU::OutPortB(Port + LCR, C | LCR_DLAB);
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CPU::OutPortB(Port + DLL, Divisor & 0xFF);
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CPU::OutPortB(Port + DLM, (Divisor >> 8) & 0xFF);
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CPU::OutPortB(Port + LCR, C & ~LCR_DLAB);
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}
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void Read(uint8_t* Buffer, size_t Size)
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{
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// Save the IER and disable interrupts.
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unsigned ier = CPU::InPortB(Port + IER);
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CPU::OutPortB(Port + IER, 0);
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for ( size_t I = 0; I < Size; I++ )
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{
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while ( ! ( CPU::InPortB(Port + LSR) & LSR_READY ) ) { }
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Buffer[I] = CPU::InPortB(Port);
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}
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(Port);
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CPU::OutPortB(Port + IER, ier);
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}
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void Write(const void* B, size_t Size)
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{
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const uint8_t* Buffer = (const uint8_t*) B;
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// Save the IER and disable interrupts.
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unsigned ier = CPU::InPortB(Port + IER);
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CPU::OutPortB(Port + IER, 0);
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for ( size_t I = 0; I < Size; I++ )
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{
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WaitForEmptyBuffers(Port);
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CPU::OutPortB(Port, Buffer[I]);
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}
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(Port);
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CPU::OutPortB(Port + IER, ier);
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}
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void WriteChar(char C)
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{
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// Save the IER and disable interrupts.
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unsigned ier = CPU::InPortB(Port + IER);
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CPU::OutPortB(Port + IER, 0);
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WaitForEmptyBuffers(Port);
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CPU::OutPortB(Port, C);
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(Port);
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CPU::OutPortB(Port + IER, ier);
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}
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int TryPopChar()
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{
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// Save the IER and disable interrupts.
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unsigned ier = CPU::InPortB(Port + IER);
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CPU::OutPortB(Port + IER, 0);
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int Result = -1;
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if ( CPU::InPortB(Port + LSR) & LSR_READY )
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{
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Result = CPU::InPortB(Port);
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}
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(Port);
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CPU::OutPortB(Port + IER, ier);
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return Result;
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}
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}
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}
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}
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void WaitForEmptyBuffers(unsigned port)
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{
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while ( (CPU::InPortB(port + LSR) & BOTH_EMPTY) != BOTH_EMPTY );
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}
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const unsigned PORT = 0x3F8;
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void Init()
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{
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unsigned baud = ProbeBaud(PORT);
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CPU::OutPortB(PORT + LCR, 0x3); // 8n1
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CPU::OutPortB(PORT + IER, 0); // No interrupt
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CPU::OutPortB(PORT + FCR, 0); // No FIFO
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CPU::OutPortB(PORT + MCR, 0x3); // DTR + RTS
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unsigned divisor = 115200 / baud;
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uint8_t c = CPU::InPortB(PORT + LCR);
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CPU::OutPortB(PORT + LCR, c | LCR_DLAB);
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CPU::OutPortB(PORT + DLL, divisor >> 0 & 0xFF);
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CPU::OutPortB(PORT + DLM, divisor >> 8 & 0xFF);
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CPU::OutPortB(PORT + LCR, c & ~LCR_DLAB);
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}
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void Read(uint8_t* buffer, size_t size)
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{
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// Save the IER and disable interrupts.
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unsigned ier = CPU::InPortB(PORT + IER);
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CPU::OutPortB(PORT + IER, 0);
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for ( size_t i = 0; i < size; i++ )
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{
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while ( !(CPU::InPortB(PORT + LSR) & LSR_READY) );
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buffer[i] = CPU::InPortB(PORT);
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}
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(PORT);
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CPU::OutPortB(PORT + IER, ier);
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}
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void Write(const void* b, size_t size)
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{
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const uint8_t* buffer = (const uint8_t*) b;
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// Save the IER and disable interrupts.
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unsigned ier = CPU::InPortB(PORT + IER);
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CPU::OutPortB(PORT + IER, 0);
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for ( size_t i = 0; i < size; i++ )
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{
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WaitForEmptyBuffers(PORT);
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CPU::OutPortB(PORT, buffer[i]);
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}
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(PORT);
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CPU::OutPortB(PORT + IER, ier);
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}
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void WriteChar(char c)
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{
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// Save the IER and disable interrupts.
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unsigned ier = CPU::InPortB(PORT + IER);
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CPU::OutPortB(PORT + IER, 0);
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WaitForEmptyBuffers(PORT);
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CPU::OutPortB(PORT, c);
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(PORT);
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CPU::OutPortB(PORT + IER, ier);
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}
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int TryPopChar()
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{
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// Save the IER and disable interrupts.
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unsigned ier = CPU::InPortB(PORT + IER);
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CPU::OutPortB(PORT + IER, 0);
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int result = -1;
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if ( CPU::InPortB(PORT + LSR) & LSR_READY )
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result = CPU::InPortB(PORT);
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// Wait for transmitter to become empty and restore the IER.
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WaitForEmptyBuffers(PORT);
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CPU::OutPortB(PORT + IER, ier);
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return result;
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}
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} // namespace UART
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} // namespace Sortix
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@ -25,16 +25,16 @@
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#ifndef SORTIX_UART_H
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#ifndef SORTIX_UART_H
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#define SORTIX_UART_H
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#define SORTIX_UART_H
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namespace Sortix
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namespace Sortix {
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{
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namespace UART {
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namespace UART
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{
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void Init();
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void Init();
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void Read(uint8_t* buffer, size_t size);
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void Read(uint8_t* Buffer, size_t Size);
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void Write(const void* buffer, size_t size);
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void Write(const void* Buffer, size_t Size);
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void WriteChar(char c);
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void WriteChar(char C);
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int TryPopChar();
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int TryPopChar();
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}
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} // namespace UART
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}
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} // namespace Sortix
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#endif
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#endif
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