mirror of
https://gitlab.com/sortix/sortix.git
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274 lines
7.8 KiB
C++
274 lines
7.8 KiB
C++
/*******************************************************************************
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Copyright(C) Jonas 'Sortie' Termansen 2012.
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Copyright(C) Free Software Foundation, Inc. 2005, 2006, 2007, 2008, 2009.
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This file is part of Sortix.
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Sortix is free software: you can redistribute it and/or modify it under the
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terms of the GNU General Public License as published by the Free Software
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Foundation, either version 3 of the License, or (at your option) any later
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version.
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Sortix is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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details.
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You should have received a copy of the GNU General Public License along with
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Sortix. If not, see <http://www.gnu.org/licenses/>.
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x86-family/msr.cpp
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Functions to manipulate Model Specific Registers. MTRR code is partially
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based on code from GNU GRUB.
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*******************************************************************************/
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#include <sortix/kernel/kernel.h>
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#include "memorymanagement.h"
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namespace Sortix {
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namespace MSR {
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const uint32_t bit_MTRR = 0x00001000U;
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const uint32_t bit_PAT = 0x00010000U;
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// TODO: Move this to a better location or use <cpuid.h>.
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static inline bool IsCPUIdSupported()
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{
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#ifdef __x86_64__
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// TODO: Isn't this always supported under x86_64?
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uint64_t id_supported;
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asm ("pushfq\n\t"
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"popq %%rax /* Get EFLAGS into EAX */\n\t"
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"movq %%rax, %%rcx /* Save original flags in ECX */\n\t"
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"xorq $0x200000, %%rax /* Flip ID bit in EFLAGS */\n\t"
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"pushq %%rax /* Store modified EFLAGS on stack */\n\t"
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"popfq /* Replace current EFLAGS */\n\t"
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"pushfq /* Read back the EFLAGS */\n\t"
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"popq %%rax /* Get EFLAGS into EAX */\n\t"
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"xorq %%rcx, %%rax /* Check if flag could be modified */\n\t"
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: "=a" (id_supported)
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: /* No inputs. */
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: /* Clobbered: */ "%rcx");
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#else
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uint32_t id_supported;
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asm ("pushfl\n\t"
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"popl %%eax /* Get EFLAGS into EAX */\n\t"
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"movl %%eax, %%ecx /* Save original flags in ECX */\n\t"
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"xorl $0x200000, %%eax /* Flip ID bit in EFLAGS */\n\t"
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"pushl %%eax /* Store modified EFLAGS on stack */\n\t"
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"popfl /* Replace current EFLAGS */\n\t"
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"pushfl /* Read back the EFLAGS */\n\t"
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"popl %%eax /* Get EFLAGS into EAX */\n\t"
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"xorl %%ecx, %%eax /* Check if flag could be modified */\n\t"
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: "=a" (id_supported)
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: /* No inputs. */
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: /* Clobbered: */ "%rcx");
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#endif
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return id_supported != 0;
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}
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#define cpuid(num,a,b,c,d) \
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asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1" \
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: "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
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: "0" (num))
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#define rdmsr(num,a,d) \
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asm volatile ("rdmsr" : "=a" (a), "=d" (d) : "c" (num))
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#define wrmsr(num,lo,hi) \
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asm volatile ("wrmsr" : : "c" (num), "a" (lo), "d" (hi) : "memory")
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#define mtrr_base(reg) (0x200 + (reg) * 2)
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#define mtrr_mask(reg) (0x200 + (reg) * 2 + 1)
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void EnableMTRR(int mtrr)
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{
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uint32_t eax, edx;
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uint32_t mask_lo, mask_hi;
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rdmsr(mtrr_mask(mtrr), eax, edx);
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mask_lo = eax;
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mask_hi = edx;
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mask_lo |= 0x800 /* valid */;
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wrmsr(mtrr_mask(mtrr), mask_lo, mask_hi);
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}
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void DisableMTRR(int mtrr)
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{
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uint32_t eax, edx;
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uint32_t mask_lo, mask_hi;
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rdmsr(mtrr_mask(mtrr), eax, edx);
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mask_lo = eax;
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mask_hi = edx;
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mask_lo &= ~0x800 /* valid */;
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wrmsr(mtrr_mask(mtrr), mask_lo, mask_hi);
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}
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void CopyMTRR(int dst, int src)
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{
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uint32_t base_lo, base_hi;
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uint32_t mask_lo, mask_hi;
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rdmsr(mtrr_base(src), base_lo, base_hi);
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rdmsr(mtrr_mask(src), mask_lo, mask_hi);
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wrmsr(mtrr_base(dst), base_lo, base_hi);
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wrmsr(mtrr_mask(dst), mask_lo, mask_hi);
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}
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bool IsPATSupported()
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{
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if ( !IsCPUIdSupported() ) { return false; }
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uint32_t eax, ebx, ecx, edx;
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cpuid(1, eax, ebx, ecx, edx);
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uint32_t features = edx;
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return features & bit_PAT;
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}
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void InitializePAT()
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{
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using namespace Sortix::Memory;
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const uint32_t LO = PA[0] << 0 | PA[1] << 8 | PA[2] << 16 | PA[3] << 24;
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const uint32_t HI = PA[4] << 0 | PA[5] << 8 | PA[6] << 16 | PA[7] << 24;
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const int PAT_REG = 0x0277;
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wrmsr(PAT_REG, LO, HI);
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}
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bool IsMTRRSupported()
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{
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if ( !IsCPUIdSupported() ) { return false; }
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uint32_t eax, ebx, ecx, edx;
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cpuid(1, eax, ebx, ecx, edx);
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uint32_t features = edx;
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return features & bit_MTRR;
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}
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// TODO: Yes, returning a string as an error and giving the result in a pointer
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// is very bad design. Please fix this at some point. Also improve the code such
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// that it is more flexible.
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const char* SetupMTRRForWC(addr_t base, size_t size, int* ret)
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{
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uint32_t eax, ebx, ecx, edx;
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uint32_t mtrrcap;
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int var_mtrrs;
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uint32_t max_extended_cpuid;
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uint32_t maxphyaddr;
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uint64_t fb_base, fb_size;
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uint64_t size_bits, fb_mask;
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uint32_t bits_lo, bits_hi;
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uint64_t bits;
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int i, first_unused = -1;
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uint32_t base_lo, base_hi, mask_lo, mask_hi;
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fb_base = (uint64_t) base;
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fb_size = (uint64_t) size;
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// Check that fb_base and fb_size can be represented using a single MTRR.
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if ( fb_base < (1 << 20) )
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return "below 1MB, so covered by fixed-range MTRRs";
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if ( fb_base >= (1LL << 36) )
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return "over 36 bits, so out of range";
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if ( fb_size < (1 << 12) )
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return "variable-range MTRRs must cover at least 4KB";
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size_bits = fb_size;
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while ( size_bits > 1 )
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size_bits >>= 1;
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if ( size_bits != 1 )
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return "not a power of two";
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if ( fb_base & (fb_size - 1) )
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return "not aligned on size boundary";
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fb_mask = ~(fb_size - 1);
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// Check CPU capabilities.
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if ( !IsCPUIdSupported() )
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return "cpuid not supported, therefore mtrr not supported";
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if ( !IsMTRRSupported() )
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return "cpu does not support mtrr";
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rdmsr(0xFE, eax, edx);
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mtrrcap = eax;
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if ( !(mtrrcap & 0x00000400) ) /* write-combining */
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return "write combining doesn't seem to be supported";
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var_mtrrs = (mtrrcap & 0xFF);
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cpuid (0x80000000, eax, ebx, ecx, edx);
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max_extended_cpuid = eax;
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if ( max_extended_cpuid >= 0x80000008 )
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{
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cpuid(0x80000008, eax, ebx, ecx, edx);
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maxphyaddr = (eax & 0xFF);
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}
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else
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maxphyaddr = 36;
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bits_lo = 0xFFFFF000; /* assume maxphyaddr >= 36 */
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bits_hi = (1 << (maxphyaddr - 32)) - 1;
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bits = bits_lo | ((uint64_t) bits_hi << 32);
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// Check whether an MTRR already covers this region. If not, take an unused
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// one if possible.
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for ( i = 0; i < var_mtrrs; i++ )
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{
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rdmsr(mtrr_mask (i), eax, edx);
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mask_lo = eax;
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mask_hi = edx;
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if ( mask_lo & 0x800 ) /* valid */
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{
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uint64_t real_base, real_mask;
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rdmsr(mtrr_base(i), eax, edx);
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base_lo = eax;
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base_hi = edx;
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real_base = ((uint64_t) (base_hi & bits_hi) << 32) |
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(base_lo & bits_lo);
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real_mask = ((uint64_t) (mask_hi & bits_hi) << 32) |
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(mask_lo & bits_lo);
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if ( real_base < (fb_base + fb_size) &&
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real_base + (~real_mask & bits) >= fb_base)
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return "region already covered by another mtrr";
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}
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else if ( first_unused < 0 )
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first_unused = i;
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}
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if ( first_unused < 0 )
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return "all MTRRs in use";
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// Set up the first unused MTRR we found.
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rdmsr(mtrr_base(first_unused), eax, edx);
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base_lo = eax;
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base_hi = edx;
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rdmsr(mtrr_mask(first_unused), eax, edx);
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mask_lo = eax;
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mask_hi = edx;
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base_lo = (base_lo & ~bits_lo & ~0xFF) |
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(fb_base & bits_lo) | 0x01 /* WC */;
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base_hi = (base_hi & ~bits_hi) |
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((fb_base >> 32) & bits_hi);
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wrmsr(mtrr_base(first_unused), base_lo, base_hi);
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mask_lo = (mask_lo & ~bits_lo) |
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(fb_mask & bits_lo) | 0x800 /* valid */;
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mask_hi = (mask_hi & ~bits_hi) |
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((fb_mask >> 32) & bits_hi);
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wrmsr(mtrr_mask(first_unused), mask_lo, mask_hi);
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if ( ret )
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*ret = first_unused;
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return NULL;
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}
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} // namespace MSR
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} // namespace Sortix
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