mirror of
https://gitlab.com/sortix/sortix.git
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160 lines
5.1 KiB
C++
160 lines
5.1 KiB
C++
/*******************************************************************************
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Copyright(C) Jonas 'Sortie' Termansen 2011, 2012.
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This file is part of Sortix.
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Sortix is free software: you can redistribute it and/or modify it under the
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terms of the GNU General Public License as published by the Free Software
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Foundation, either version 3 of the License, or (at your option) any later
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version.
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Sortix is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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details.
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You should have received a copy of the GNU General Public License along with
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Sortix. If not, see <http://www.gnu.org/licenses/>.
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x86-family/gdt.cpp
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Initializes and handles the GDT and TSS.
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*******************************************************************************/
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#include <sortix/kernel/platform.h>
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#include <string.h>
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#include "gdt.h"
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namespace Sortix
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{
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namespace GDT
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{
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extern "C" void gdt_flush(addr_t);
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extern "C" void tss_flush();
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const size_t GDT_NUM_ENTRIES = 7;
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gdt_entry_t gdt_entries[GDT_NUM_ENTRIES];
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gdt_ptr_t gdt_ptr;
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tss_entry_t tss_entry;
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const uint8_t GRAN_64_BIT_MODE = 1<<5;
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const uint8_t GRAN_32_BIT_MODE = 1<<6;
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const uint8_t GRAN_4KIB_BLOCKS = 1<<7;
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void Init()
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{
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gdt_ptr.limit = (sizeof(gdt_entry_t) * GDT_NUM_ENTRIES) - 1;
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gdt_ptr.base = (addr_t) &gdt_entries;
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#ifdef PLATFORM_X86
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const uint8_t gran = GRAN_4KIB_BLOCKS | GRAN_32_BIT_MODE;
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#elif defined(PLATFORM_X64)
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const uint8_t gran = GRAN_4KIB_BLOCKS | GRAN_64_BIT_MODE;
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#endif
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SetGate(0, 0, 0, 0, 0); // Null segment
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SetGate(1, 0, 0xFFFFFFFF, 0x9A, gran); // Code segment
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SetGate(2, 0, 0xFFFFFFFF, 0x92, gran); // Data segment
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SetGate(3, 0, 0xFFFFFFFF, 0xFA, gran); // User mode code segment
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SetGate(4, 0, 0xFFFFFFFF, 0xF2, gran); // User mode data segment
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WriteTSS(5, 0x10, 0x0);
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if ( gdt_ptr.base != (addr_t) &gdt_entries )
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{
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// If this happens, then either there is a bug in the GDT entry
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// writing code - or the struct gdt_entries above is too small.
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Panic("Whoops, someone overwrote the GDT pointer while writing "
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"to the GDT entries!");
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}
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gdt_flush((addr_t) &gdt_ptr);
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tss_flush();
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}
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// Set the value of a GDT entry.
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void SetGate(int32_t num, uint32_t base, uint32_t limit, uint8_t access, uint8_t gran)
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{
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gdt_entry_t* entry = (gdt_entry_t*) (&gdt_entries[num]);
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entry->base_low = (base & 0xFFFF);
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entry->base_middle = (base >> 16) & 0xFF;
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entry->base_high = (base >> 24) & 0xFF;
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entry->limit_low = (limit & 0xFFFF);
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entry->granularity = ((limit >> 16) & 0x0F) | (gran & 0xF0);
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entry->access = access;
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}
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// Set the value of a GDT entry.
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void SetGate64(int32_t num, uint64_t base, uint32_t limit, uint8_t access, uint8_t gran)
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{
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gdt_entry64_t* entry = (gdt_entry64_t*) (&gdt_entries[num]);
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entry->base_low = (base & 0xFFFF);
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entry->base_middle = (base >> 16) & 0xFF;
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entry->base_high = (base >> 24) & 0xFF;
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entry->base_highest = (base >> 32);
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entry->limit_low = (limit & 0xFFFF);
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entry->granularity = ((limit >> 16) & 0x0F) | (gran & 0xF0);
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entry->access = access;
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entry->zero1 = 0;
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}
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// Initialise our task state segment structure.
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void WriteTSS(int32_t num, uint16_t ss0, addr_t stack0)
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{
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// First, let's compute the base and limit of our entry in the GDT.
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addr_t base = (addr_t) &tss_entry;
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uint32_t limit = base + sizeof(tss_entry);
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// Now, add our TSS descriptor's address to the GDT.
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#ifdef PLATFORM_X86
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SetGate(num, base, limit, 0xE9, 0x00);
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#elif defined(PLATFORM_X64)
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SetGate64(num, base, limit, 0xE9, 0x00);
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#endif
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// Ensure the descriptor is initially zero.
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memset(&tss_entry, 0, sizeof(tss_entry));
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#ifdef PLATFORM_X86
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tss_entry.ss0 = ss0; // Set the kernel stack segment.
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tss_entry.esp0 = stack0; // Set the kernel stack pointer.
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// Here we set the cs, ss, ds, es, fs and gs entries in the TSS.
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// These specify what segments should be loaded when the processor
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// switches to kernel mode. Therefore they are just our normal
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// kernel code/data segments - 0x08 and 0x10 respectively, but with
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// the last two bits set, making 0x0b and 0x13. The setting of these
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// bits sets the RPL (requested privilege level) to 3, meaning that
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// this TSS can be used to switch to kernel mode from ring 3.
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tss_entry.cs = 0x08 | 0x3;
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tss_entry.ss = tss_entry.ds = tss_entry.es = tss_entry.fs = tss_entry.gs = 0x10 | 0x3;
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#elif defined(PLATFORM_X64)
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(void) ss0;
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tss_entry.stack0 = stack0;
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#endif
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}
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void SetKernelStack(addr_t stacklower, size_t stacksize, addr_t stackhigher)
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{
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#ifdef PLATFORM_X86
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(void) stacklower;
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(void) stacksize;
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tss_entry.esp0 = (uint32_t) stackhigher;
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#elif defined(PLATFORM_X64)
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(void) stacklower;
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(void) stacksize;
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tss_entry.stack0 = (uint64_t) stackhigher;
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#else
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#warning "TSS is not yet supported on this arch!"
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while(true);
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#endif
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}
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}
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}
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