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kernel
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compare: tailix:6e7bb02546b30b5f4c10b4737cc2770191ec7d61
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tailix:master

10 Commits
b6e0952aa3 ... 6e7bb02546

Author SHA1 Message Date
Alex Kotov 6e7bb02546
Replace console print with puts 2022-11-29 00:00:17 +04:00
Alex Kotov 2c3214eabb
Remove unnecessary code 2022-11-28 19:23:00 +04:00
Alex Kotov b62433e227
Use poweroff driver from libkernaux 2022-11-28 19:07:14 +04:00
Alex Kotov 65a1acb58d
Rewrite poweroff 2022-11-28 18:31:07 +04:00
Alex Kotov 5b72e959c5
Use new libkernaux API 2022-11-28 16:44:36 +04:00
Alex Kotov 6c15d5355c
Get rid of magic numbers in IDTEs 2022-11-28 14:30:37 +04:00
Alex Kotov 46bd41514c
Use KernAux_Arch_I386_IDTE_set_offset from libkernaux 2022-11-28 14:13:37 +04:00
Alex Kotov 6f4262877e
Use DTR from libkernaux 2022-11-28 02:50:56 +04:00
Alex Kotov c03c242633
Use types from <stdint.h> 2022-11-28 01:11:04 +04:00
Alex Kotov af576c473d
Use IDTE from libkernaux 2022-11-28 01:03:21 +04:00
5 changed files with 91 additions and 105 deletions
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9
src/interrupts/exception.c
View File

@ -40,11 +40,12 @@ static const char *const messages[] = {
void exception_handler(struct IsrRegisters regs)
{
if (regs.int_no > INT_EXCEPTION_LAST) {
return;
}
if (regs.int_no > INT_EXCEPTION_LAST) return;
kernaux_drivers_console_printf("[FAIL] exception: Unhandled protected-mode exception: %s\n", messages[regs.int_no]);
kernaux_drivers_console_printf(
"[FAIL] exception: Unhandled protected-mode exception: %s\n",
messages[regs.int_no]
);
panic("Can not continue.");
}

2
src/main.c
View File

@ -68,5 +68,5 @@ void main(
protected_initialize(&kinfo);
kernaux_drivers_console_print("[INFO] main: Finished.\n");
kernaux_drivers_console_puts("[INFO] main: Finished.");
}

11
src/panic.c
View File

@ -2,16 +2,13 @@
#include <kernaux/asm/i386.h>
#include <kernaux/drivers/console.h>
static void poweroff()
{
kernaux_asm_i386_outportw(0x604, 0x2000);
}
#include <kernaux/drivers/shutdown.h>
#include <kernaux/drivers/qemu.h>
void panic(const char *const s)
{
kernaux_drivers_console_printf("[FAIL] panic: %s\n", s);
poweroff();
kernaux_drivers_shutdown_poweroff();
}
void halt()
@ -26,5 +23,5 @@ void kernaux_assert_fn(
) {
kernaux_drivers_console_printf("[FAIL] assertion failed: %s:%u: \"%s\"\n",
file, line, str);
poweroff();
kernaux_drivers_shutdown_poweroff();
}

172
src/protected.c
View File

@ -9,78 +9,59 @@
#include <kernaux/drivers/console.h>
#include <kernaux/drivers/intel_8259_pic.h>
#include <stdint.h>
#include <string.h>
struct GdtPointer {
unsigned short limit;
unsigned int base;
}
__attribute__((packed));
static struct KernAux_Arch_I386_DTR gdt_pointer;
static struct KernAux_Arch_I386_DTR idt_pointer;
struct IdtPointer {
unsigned short limit;
unsigned int base;
}
__attribute__((packed));
struct IdtEntry {
unsigned short base_lo;
unsigned short sel;
unsigned char always0;
unsigned char flags;
unsigned short base_hi;
};
static struct GdtPointer gdt_pointer;
static struct IdtPointer idt_pointer;
static struct KernAux_Arch_I386_DTE gdt_entries[GDT_SIZE];
static struct IdtEntry idt_entries[IDT_SIZE];
static struct KernAux_Arch_I386_DTE gdt_entries[GDT_SIZE];
static struct KernAux_Arch_I386_IDTE idt_entries[IDT_SIZE];
static struct KernAux_Arch_I386_TSS tss;
static void gdt_set_gates();
static void idt_set_gates();
static void idt_set_gate(unsigned char num, unsigned int base, unsigned short sel, unsigned char flags);
static void idt_set_gate(uint8_t num, uint32_t base, uint16_t sel, uint8_t flags);
void protected_initialize(const struct Kernel_Info *const kinfo)
{
kernaux_drivers_intel_8259_pic_remap(32, 40);
kernaux_drivers_intel_8259_pic_disable_all();
kernaux_drivers_console_print("[INFO] protected: Setup GDT.\n");
kernaux_drivers_console_puts("[INFO] protected: Setup GDT.");
gdt_set_gates();
kernaux_drivers_console_print("[INFO] protected: Setup IDT.\n");
kernaux_drivers_console_puts("[INFO] protected: Setup IDT.");
idt_set_gates();
kernaux_drivers_console_print("[INFO] protected: Setup TSS.\n");
kernaux_drivers_console_puts("[INFO] protected: Setup TSS.");
memset(&tss, 0, sizeof(tss));
tss.ss0 = GDT_KERNEL_DS_SELECTOR;
tss.esp0 = kinfo->kernel_stack_start + kinfo->kernel_stack_size;
kernaux_drivers_console_print("[INFO] protected: Load GDT.\n");
gdt_pointer.limit = sizeof(struct KernAux_Arch_I386_DTE) * GDT_SIZE - 1;
gdt_pointer.base = (unsigned int)&gdt_entries;
kernaux_drivers_console_puts("[INFO] protected: Load GDT.");
gdt_pointer.size = sizeof(struct KernAux_Arch_I386_DTE) * GDT_SIZE - 1;
gdt_pointer.offset = (uint32_t)&gdt_entries;
kernaux_asm_i386_flush_gdt(
(uint32_t)&gdt_pointer,
GDT_KERNEL_DS_SELECTOR,
GDT_KERNEL_CS_SELECTOR
);
kernaux_drivers_console_print("[INFO] protected: Load IDT.\n");
idt_pointer.limit = sizeof(struct IdtEntry) * IDT_SIZE - 1;
idt_pointer.base = (unsigned int)&idt_entries;
kernaux_drivers_console_puts("[INFO] protected: Load IDT.");
idt_pointer.size = sizeof(struct KernAux_Arch_I386_IDTE) * IDT_SIZE - 1;
idt_pointer.offset = (uint32_t)&idt_entries;
kernaux_asm_i386_flush_idt((uint32_t)&idt_pointer);
// kernaux_drivers_console_print("[INFO] protected: Load TSS.\n");
// kernaux_drivers_console_puts("[INFO] protected: Load TSS.");
// kernaux_asm_i386_flush_tss(GDT_TSS_SELECTOR);
kernaux_drivers_console_print("[INFO] protected: Enable interrupts.\n");
kernaux_drivers_console_puts("[INFO] protected: Enable interrupts.");
asm volatile ("sti");
kernaux_drivers_console_print("[INFO] protected: Finished.\n");
kernaux_drivers_console_puts("[INFO] protected: Finished.");
}
void gdt_set_gates()
@ -187,69 +168,76 @@ void idt_set_gates()
{
memset(idt_entries, 0, sizeof(idt_entries));
const uint16_t flags_base = 0x8e;
const uint16_t flags_priv_user = 0x60;
// exception
idt_set_gate(0, (unsigned int)interrupt_0, 0x08, 0x8E);
idt_set_gate(1, (unsigned int)interrupt_1, 0x08, 0x8E);
idt_set_gate(2, (unsigned int)interrupt_2, 0x08, 0x8E);
idt_set_gate(3, (unsigned int)interrupt_3, 0x08, 0x8E);
idt_set_gate(4, (unsigned int)interrupt_4, 0x08, 0x8E);
idt_set_gate(5, (unsigned int)interrupt_5, 0x08, 0x8E);
idt_set_gate(6, (unsigned int)interrupt_6, 0x08, 0x8E);
idt_set_gate(7, (unsigned int)interrupt_7, 0x08, 0x8E);
idt_set_gate(8, (unsigned int)interrupt_8, 0x08, 0x8E);
idt_set_gate(9, (unsigned int)interrupt_9, 0x08, 0x8E);
idt_set_gate(10, (unsigned int)interrupt_10, 0x08, 0x8E);
idt_set_gate(11, (unsigned int)interrupt_11, 0x08, 0x8E);
idt_set_gate(12, (unsigned int)interrupt_12, 0x08, 0x8E);
idt_set_gate(13, (unsigned int)interrupt_13, 0x08, 0x8E);
idt_set_gate(14, (unsigned int)interrupt_14, 0x08, 0x8E);
idt_set_gate(15, (unsigned int)interrupt_15, 0x08, 0x8E);
idt_set_gate(16, (unsigned int)interrupt_16, 0x08, 0x8E);
idt_set_gate(17, (unsigned int)interrupt_17, 0x08, 0x8E);
idt_set_gate(18, (unsigned int)interrupt_18, 0x08, 0x8E);
idt_set_gate(19, (unsigned int)interrupt_19, 0x08, 0x8E);
idt_set_gate(20, (unsigned int)interrupt_20, 0x08, 0x8E);
idt_set_gate(21, (unsigned int)interrupt_21, 0x08, 0x8E);
idt_set_gate(22, (unsigned int)interrupt_22, 0x08, 0x8E);
idt_set_gate(23, (unsigned int)interrupt_23, 0x08, 0x8E);
idt_set_gate(24, (unsigned int)interrupt_24, 0x08, 0x8E);
idt_set_gate(25, (unsigned int)interrupt_25, 0x08, 0x8E);
idt_set_gate(26, (unsigned int)interrupt_26, 0x08, 0x8E);
idt_set_gate(27, (unsigned int)interrupt_27, 0x08, 0x8E);
idt_set_gate(28, (unsigned int)interrupt_28, 0x08, 0x8E);
idt_set_gate(29, (unsigned int)interrupt_29, 0x08, 0x8E);
idt_set_gate(30, (unsigned int)interrupt_30, 0x08, 0x8E);
idt_set_gate(31, (unsigned int)interrupt_31, 0x08, 0x8E);
idt_set_gate(0, (uint32_t)interrupt_0, 0x08, flags_base);
idt_set_gate(1, (uint32_t)interrupt_1, 0x08, flags_base);
idt_set_gate(2, (uint32_t)interrupt_2, 0x08, flags_base);
idt_set_gate(3, (uint32_t)interrupt_3, 0x08, flags_base);
idt_set_gate(4, (uint32_t)interrupt_4, 0x08, flags_base);
idt_set_gate(5, (uint32_t)interrupt_5, 0x08, flags_base);
idt_set_gate(6, (uint32_t)interrupt_6, 0x08, flags_base);
idt_set_gate(7, (uint32_t)interrupt_7, 0x08, flags_base);
idt_set_gate(8, (uint32_t)interrupt_8, 0x08, flags_base);
idt_set_gate(9, (uint32_t)interrupt_9, 0x08, flags_base);
idt_set_gate(10, (uint32_t)interrupt_10, 0x08, flags_base);
idt_set_gate(11, (uint32_t)interrupt_11, 0x08, flags_base);
idt_set_gate(12, (uint32_t)interrupt_12, 0x08, flags_base);
idt_set_gate(13, (uint32_t)interrupt_13, 0x08, flags_base);
idt_set_gate(14, (uint32_t)interrupt_14, 0x08, flags_base);
idt_set_gate(15, (uint32_t)interrupt_15, 0x08, flags_base);
idt_set_gate(16, (uint32_t)interrupt_16, 0x08, flags_base);
idt_set_gate(17, (uint32_t)interrupt_17, 0x08, flags_base);
idt_set_gate(18, (uint32_t)interrupt_18, 0x08, flags_base);
idt_set_gate(19, (uint32_t)interrupt_19, 0x08, flags_base);
idt_set_gate(20, (uint32_t)interrupt_20, 0x08, flags_base);
idt_set_gate(21, (uint32_t)interrupt_21, 0x08, flags_base);
idt_set_gate(22, (uint32_t)interrupt_22, 0x08, flags_base);
idt_set_gate(23, (uint32_t)interrupt_23, 0x08, flags_base);
idt_set_gate(24, (uint32_t)interrupt_24, 0x08, flags_base);
idt_set_gate(25, (uint32_t)interrupt_25, 0x08, flags_base);
idt_set_gate(26, (uint32_t)interrupt_26, 0x08, flags_base);
idt_set_gate(27, (uint32_t)interrupt_27, 0x08, flags_base);
idt_set_gate(28, (uint32_t)interrupt_28, 0x08, flags_base);
idt_set_gate(29, (uint32_t)interrupt_29, 0x08, flags_base);
idt_set_gate(30, (uint32_t)interrupt_30, 0x08, flags_base);
idt_set_gate(31, (uint32_t)interrupt_31, 0x08, flags_base);
// hwint: master PIC
idt_set_gate(32, (unsigned int)interrupt_32, 0x08, 0x8E);
idt_set_gate(33, (unsigned int)interrupt_33, 0x08, 0x8E);
idt_set_gate(34, (unsigned int)interrupt_34, 0x08, 0x8E);
idt_set_gate(35, (unsigned int)interrupt_35, 0x08, 0x8E);
idt_set_gate(36, (unsigned int)interrupt_36, 0x08, 0x8E);
idt_set_gate(37, (unsigned int)interrupt_37, 0x08, 0x8E);
idt_set_gate(38, (unsigned int)interrupt_38, 0x08, 0x8E);
idt_set_gate(39, (unsigned int)interrupt_39, 0x08, 0x8E);
idt_set_gate(32, (uint32_t)interrupt_32, 0x08, flags_base);
idt_set_gate(33, (uint32_t)interrupt_33, 0x08, flags_base);
idt_set_gate(34, (uint32_t)interrupt_34, 0x08, flags_base);
idt_set_gate(35, (uint32_t)interrupt_35, 0x08, flags_base);
idt_set_gate(36, (uint32_t)interrupt_36, 0x08, flags_base);
idt_set_gate(37, (uint32_t)interrupt_37, 0x08, flags_base);
idt_set_gate(38, (uint32_t)interrupt_38, 0x08, flags_base);
idt_set_gate(39, (uint32_t)interrupt_39, 0x08, flags_base);
// hwint: slave PIC
idt_set_gate(40, (unsigned int)interrupt_40, 0x08, 0x8E);
idt_set_gate(41, (unsigned int)interrupt_41, 0x08, 0x8E);
idt_set_gate(42, (unsigned int)interrupt_42, 0x08, 0x8E);
idt_set_gate(43, (unsigned int)interrupt_43, 0x08, 0x8E);
idt_set_gate(44, (unsigned int)interrupt_44, 0x08, 0x8E);
idt_set_gate(45, (unsigned int)interrupt_45, 0x08, 0x8E);
idt_set_gate(46, (unsigned int)interrupt_46, 0x08, 0x8E);
idt_set_gate(47, (unsigned int)interrupt_47, 0x08, 0x8E);
idt_set_gate(40, (uint32_t)interrupt_40, 0x08, flags_base);
idt_set_gate(41, (uint32_t)interrupt_41, 0x08, flags_base);
idt_set_gate(42, (uint32_t)interrupt_42, 0x08, flags_base);
idt_set_gate(43, (uint32_t)interrupt_43, 0x08, flags_base);
idt_set_gate(44, (uint32_t)interrupt_44, 0x08, flags_base);
idt_set_gate(45, (uint32_t)interrupt_45, 0x08, flags_base);
idt_set_gate(46, (uint32_t)interrupt_46, 0x08, flags_base);
idt_set_gate(47, (uint32_t)interrupt_47, 0x08, flags_base);
// syscall
idt_set_gate(INT_SYSCALL, (unsigned int)interrupt_0x80, 0x08, 0x8E | 0x60);
idt_set_gate(
INT_SYSCALL,
(uint32_t)interrupt_0x80,
0x08,
flags_base | flags_priv_user
);
}
void idt_set_gate(unsigned char num, unsigned int base, unsigned short sel, unsigned char flags)
void idt_set_gate(uint8_t num, uint32_t base, uint16_t sel, uint8_t flags)
{
idt_entries[num].base_lo = base & 0xFFFF;
idt_entries[num].base_hi = (base >> 16) & 0xFFFF;
idt_entries[num].sel = sel;
idt_entries[num].always0 = 0;
idt_entries[num].flags = flags;
KernAux_Arch_I386_IDTE_set_offset(&idt_entries[num], base);
idt_entries[num].selector = sel;
idt_entries[num]._zero0 = 0;
idt_entries[num].flags = flags;
}

2
src/timer.c
View File

@ -6,7 +6,7 @@
void timer_initialize(unsigned int frequency)
{
kernaux_drivers_console_print("[INFO] timer: Initialize timer.\n");
kernaux_drivers_console_puts("[INFO] timer: Initialize timer.");
kernaux_drivers_intel_8253_pit_initialize(frequency);
}